H04N25/617

IMAGING DEVICE AND IMAGING METHOD
20230217127 · 2023-07-06 ·

There is no risk of generating unnecessary events.

This imaging device comprises: a photoelectric conversion unit that has a plurality of photoelectric conversion elements for performing photoelectric conversion to generate an electric signal; a setting unit that sets a threshold value according to a noise level in a predetermined region among the plurality of photoelectric conversion elements; and a first detection unit that detects a detection signal in a case where the amount of change in the electric signal generated by the plurality of photoelectric conversion elements exceeds the threshold value.

Imaging device and imaging system

An imaging device including pixels including a first pixel and a second pixel, the pixels arranged in rows and columns, the first pixel belonging to a first column, the second pixel belonging to a second column adjacent the first column; a first signal path through which a signal from the first pixel flows; and a second signal path through which a signal from the second pixel flows, a first circuit including first and second lines, a first voltage being applied to the first lines, a second voltage different from the first voltage applied to the second lines. The first signal path is located in a region closer to one of the first lines than any of the second lines in a plan view, and the second signal path is located in a region closer to one of the second lines than any of the first lines in the plan view.

Methods and systems for increasing PSRR compensation range in an image sensor

A method for compensating a Power Supply Rejection Ratio (PSRR) in an image sensor, the method includes receiving, by processing circuitry, at least one analog signal from an active pixels sensor (APS) array, the at least one analog signal including power supply noise, combining, by the processing circuitry, amplified power supply noise with at least one ramp signal to obtain combined power supply noise, and compensating, by the processing circuitry, the PSRR of the APS array by cancelling the power supply noise of the at least one analog signal using the combined power supply noise.

Radiation imaging apparatus, radiation imaging system, control method of radiation imaging apparatus, and non-transitory computer-readable storage medium

A radiation imaging apparatus is provided. The radiation imaging apparatus comprises a plurality of pixels used to acquire a radiation image, and a readout circuit configured to read out a signal from each of the plurality of pixels. Correction image data used for performing offset correction is acquired from the plurality of pixels in an acquisition mode associated with an estimated value of the signal and system noise generated when the readout circuit reads out the signal, the estimated value and the system noise being set according to an imaging mode by a user.

Radiation imaging apparatus, radiation imaging system, control method of radiation imaging apparatus, and non-transitory computer-readable storage medium

A radiation imaging apparatus is provided. The radiation imaging apparatus comprises a plurality of pixels used to acquire a radiation image, and a readout circuit configured to read out a signal from each of the plurality of pixels. Correction image data used for performing offset correction is acquired from the plurality of pixels in an acquisition mode associated with an estimated value of the signal and system noise generated when the readout circuit reads out the signal, the estimated value and the system noise being set according to an imaging mode by a user.

Dynamic correlated double sampling for noise rejection in image sensors
11546532 · 2023-01-03 · ·

A method of reading a pixel value from an image sensor housed with a set of components includes determining a current state of the set of components; adjusting, at least partly responsive to the current state of the set of components, a correlated double sampling (CDS) time; and performing, in accordance with the adjusted CDS time, a CDS readout of at least one pixel in a pixel array of the image sensor.

Low power in-pixel single slope analog to digital converter (ADC)

Techniques, systems, architectures, and methods for reducing peak power during an Analog-to-Digital Conversion (ADC) process, in embodiments on a Focal Plane Array (FPA).

IMAGING ELEMENT, DISTANCE MEASURING DEVICE, AND ELECTRONIC DEVICE
20230058408 · 2023-02-23 ·

Provided are an imaging element, a distance measuring device, and an electronic device capable of improving resolution of a distance image while preventing generation of electromagnetic noise.

An imaging element according to the present disclosure includes: a signal generator configured to generate a clock signal; a plurality of flip-flops connected in a cascade manner; a circuit block configured to supply a first signal to a clock terminal of each of the plurality of flip-flops and to supply a second signal to an input terminal of a first-stage flip-flop of the plurality of flip-flops in accordance with the clock signal; and a pixel array including pixels configured to be driven using pulse signals supplied from different stages of the plurality of flip-flops.

READING CIRCUIT FOR A PIXEL ARRAY
20220368847 · 2022-11-17 ·

The present disclosure relates to a read-out circuit comprising N inputs configured to be connected to N respective outputs of a pixel array of an image sensor, with N being an integer strictly greater than 1; and N analog-to-digital converters organized in K groups, with K being an integer strictly greater than 1 and strictly less than N, and each having a first input coupled to a respective one of the N inputs and a second input. In each group, the second inputs of the analog-to-digital converters of the group are connected together, electrically decoupled from the second inputs of the analog-to-digital converters of the other groups, and configured to receive a first reference signal that is identical for all the analog-to-digital converters of the group.

Amplifier

Provided is an amplifier that includes a first transistor including a gate terminal to which an applied input signal is input, where a current depending on the applied input signal flows through the first transistor. A gate terminal of a second transistor is connected to a load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.