An image sensor may include one or more pixels having a charge steering structure that may selectively route charge from a photodiode to increase the dynamic range of the pixel. The charge steering structure may be a coupled gate structure that routes overflow charge to a voltage supply and to one or more integrating storage structures during an exposure period. The charge steering structure may be two integrating storage structures directly connected to the photodiode that each integrate charge generated by the photodiode in an alternating fashion during an exposure period. Storage structures and transistors within the charge steering structure may receive control signals, which may be asserted in a mutually exclusive manner. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.

An image sensor for detecting light-emitting diode (LED) without flickering includes a pixel array with pixels. Each pixel including subpixels including a first and a second subpixel, dual floating diffusion (DFD) transistor, and a capacitor coupled to the DFD transistor. First subpixel includes a first photosensitive element to acquire a first image charge, and a first transfer gate transistor to selectively transfer the first image charge from the first photosensitive element to a first floating diffusion (FD) node. Second subpixel includes a second photosensitive element to acquire a second image charge, and a second transfer gate transistor to selectively transfer the second image charge from the second photosensitive element to a second FD node. DFD transistor coupled to the first and the second FD nodes. Other embodiments are also described.

A high dynamic range imaging pixel may include a photodiode that generates charge in response to incident light. When the generated charge exceeds a first charge level, the charge may overflow through a first transistor to a first storage capacitor. When the generated charge exceeds a second charge level that is higher than the first charge level, the charge may overflow through a second transistor. The charge that overflows through the second transistor may alternately be coupled to a voltage supply and drained or transferred to a second storage capacitor for subsequent readout. Diverting more overflow charge to the voltage supply may increase the dynamic range of the pixel. The amount of charge diverted to the voltage supply may therefore be updated to control the dynamic range of the imaging pixel.

The present technology relates to a solid-state imaging device and an electronic device capable of improving a saturation characteristic. A photo diode is formed on a substrate, and a floating diffusion accumulates a signal charge read from the photo diode. A plurality of vertical gate electrodes is formed from a surface of the substrate in a depth direction in a region between the photo diode and the floating diffusion, and an overflow path is formed in a region interposed between a plurality of vertical gate electrodes. The present technology may be applied to a CMOS image sensor.

A solid-state imaging device comprises a first pixel group includes a first photoelectric conversion unit that converts into electric charges reflection light pulses from an object irradiated with an irradiation light pulse, a first electric charge accumulation unit accumulating the electric charges in synchrony with turning on the irradiation light pulses, and a first reset unit resetting the electric charges; and a second pixel group includes a second photoelectric conversion unit that converts the reflection light into electric charges, a second electric charge accumulation unit that accumulates the electric charges synchronously with a switching the irradiation light pulses from on to off, and a second reset unit that releases a reset of the electric charges converted by the second photoelectric conversion unit.

An image sensor which operates in a global shutter mode is provided. The image sensor includes a pixel array comprising a plurality of pixels arranged in a plurality of rows and columns, a timing generator configured to generate row driver control signals which controls an integration period of a pixel of the plurality of pixels to include at least two sub integration periods, and a row driver configured to generate a plurality of row control signals which controls each of the rows in the pixel array based on the row driver control signals, wherein the timing generator is further configured to control a single image frame to include the integration period and a readout period of the pixel, based on the row driver control signals.

A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged on a semiconductor substrate, in which each of the pixels includes a photoelectric converting portion and a charge converting portion for converting a charge generated by photoelectric conversion into a pixel signal and blooming is suppressed by controlling a substrate voltage of the semiconductor substrate.

An imaging pixel may be operated in either a linear mode or a logarithmic mode. In the logarithmic mode, the voltage at a floating diffusion region may be proportional to the logarithm of the intensity of incident light. In order to enable correlated double sampling (CDS) in the logarithmic mode, a transistor may be provided that couples the photodiode to a bias voltage. When the transistor is turned off, the photodiode may be able to operate in a logarithmic mode. When the transistor is turned on, the floating diffusion region may be reset to a baseline voltage level. Images from the linear mode and the logarithmic mode may be combined to form high dynamic range images with flicker mitigation.

A pixel comprises a high-response photodiode that collects photocharge, a first transfer gate that enables the charge to be transferred off the high-response photodiode, completely emptying it onto a low-response photodiode, a second transfer gate enables the charge to be transferred off the low-response photodiode, completely emptying it onto floating diffusion, a third transfer gate for anti-blooming; the floating diffusion collects the transferred charge creating a change of voltage, a means of resetting the floating diffusion. A source-follower is modulated by the voltage on floating diffusion to control bit-line voltage and column-amplifier output. In examples, photocharge is integrated onto both the high-response photodiode and onto the low-response photodiode. The column readout circuit consists of a column amplifier that uses capacitors to set the amplifier gain, three sampling capacitors used as analog memory and for correlated double sampling, and a comparator that assists in providing the final output.

An image sensor is provided including a pixel array, a correlated double sampling (CDS) unit, an analog-digital converting (ADC) unit, a control unit, and an overflow power voltage control unit. The pixel array includes at least one unit pixel that generates accumulated charges corresponding to incident light in a photoelectric conversion period and outputs an analog signal based on the accumulated charges in a readout period. The CDS unit generates an image signal by performing a CDS operation on the analog signal. An ADC unit converts the image signal into a digital signal. A control unit controls the pixel array, the CDS unit, and the ADC unit. An overflow power voltage control unit controls an overflow power voltage to have a low voltage level in the photoelectric conversion period and controls the overflow power voltage to have a high voltage level in the readout period.