A solid-state imaging device according to an embodiment includes a photoelectric conversion unit, a charge transfer unit configured to transfer a charge accumulated in the photoelectric conversion unit, a first charge modulation unit to which the charge is transferred from the photoelectric conversion unit by the charge transfer unit, a second charge modulation unit, a charge accumulation unit configured to accumulate a charge overflowing from the photoelectric conversion unit during an accumulation period, a modulation switching unit configured to couple or divide the first charge modulation unit and the second charge modulation unit, and a capacitance connection unit configured to couple or divide the second charge modulation unit and the charge accumulation unit, in which, in a state of the first charge modulation unit alone and a state where the first charge modulation unit and the second charge modulation unit are coupled by the modulation switching unit, the charge accumulated in the photoelectric conversion unit is modulated into a voltage signal, and voltage signals having different conversion efficiencies are continuously read, and the charge accumulated in the photoelectric conversion unit and the charge overflowing from the photoelectric conversion unit during the accumulation period are modulated into a voltage signal and the voltage signal is read in a capacitance obtained by coupling the first charge modulation unit, the second charge modulation unit, and the charge accumulation unit.

A distributed, parallel, image capture and processing architecture provides significant advantages over prior art systems. A very large array of computational circuits—in some embodiments, matching the size of the pixel array—is distributed around, within, or beneath the pixel array of an image sensor. Each computational circuit is dedicated to, and in some embodiments is physically proximal to, one, two, or more associated pixels. Each computational circuit is operative to perform computations on one, two, or more pixel values generated by its associated pixels. The computational circuits all perform the same operation(s), in parallel. In this manner, a very large number of pixel-level operations are performed in parallel, physically and electrically near the pixels. This obviates the need to transfer very large amounts of pixel data from a pixel array to a CPU/memory, for at least many pixel-level image processing operations, thus alleviating the significant high-speed performance constraints placed on modern image sensors.

A solid-state imaging device includes a photoelectric conversion unit, a light shielding unit and a transfer transistor. The photoelectric conversion unit generates charges by photoelectrically converting light. The light shielding unit is formed by engraving a semiconductor substrate on which the photoelectric conversion unit is formed, so as to surround an outer periphery of the photoelectric conversion unit. The transfer transistor transfers charges generated in the photoelectric conversion unit. During a charge accumulation period in which charges are accumulated in the photoelectric conversion unit, a potential that repels the charges is supplied to the light shielding unit and a gate electrode of the transfer transistor. During a charge transfer period in which charges are transferred from the photoelectric conversion unit, a potential that repels the charges is supplied to the light shielding unit and a potential that attracts the charges is supplied to the gate electrode of the transfer transistor.

The present disclosure relates to a method and system for imaging a scene. The method includes generating a shutter pattern and applying the shutter pattern to a photodetector array. The system includes a sensor architecture in three dimensions, where elements of the sensor architecture are stacked in two or more layers. Some elements of the sensor architecture include a photodetector array, register array, a generator to generate shutter patterns, readout circuitry, and an ISP.

The present disclosure relates to a method and system for imaging a scene. The method includes generating a shutter pattern and applying the shutter pattern to a photodetector array. The system includes a sensor architecture in three dimensions, where elements of the sensor architecture are stacked in two or more layers. Some elements of the sensor architecture include a photodetector array, register array, a generator to generate shutter patterns, readout circuitry, and an ISP.

An image capturing apparatus includes M detection elements, a readout circuit, and a control pulse providing circuit. Each of the M detection elements includes a detection pixel configured to detect incidence of a photon and a generation circuit configured to generate a readout request and data based on the detection of the photon in the detection pixel. The readout circuit is configured to receive the readout request and the data from each of the M detection elements. The control pulse providing circuit is configured to provide a control pulse to the M detection elements and the readout circuit. The readout circuit determines the generation circuit corresponding to the readout request and a generation timing at which the readout request is generated, based on a counter value of the time counter and the number of delay cycles included in the data corresponding to the received readout request.

An image capturing apparatus includes M detection elements, a readout circuit, and a control pulse providing circuit. Each of the M detection elements includes a detection pixel configured to detect incidence of a photon and a generation circuit configured to generate a readout request and data based on the detection of the photon in the detection pixel. The readout circuit is configured to receive the readout request and the data from each of the M detection elements. The control pulse providing circuit is configured to provide a control pulse to the M detection elements and the readout circuit. The readout circuit determines the generation circuit corresponding to the readout request and a generation timing at which the readout request is generated, based on a counter value of the time counter and the number of delay cycles included in the data corresponding to the received readout request.

A method includes obtaining, from an image sensor, one or more images that represent an object, and determining a speed of the object based on the one or more images. The method also includes determining that the speed of the object exceeds a threshold speed and, based on determining that the speed of the object exceeds the threshold speed, determining a region of interest (ROI) of the image sensor expected to represent the object. The method further includes causing the image sensor to generate one or more ROI images using the ROI.

A method includes obtaining, from an image sensor, one or more images that represent an object, and determining a speed of the object based on the one or more images. The method also includes determining that the speed of the object exceeds a threshold speed and, based on determining that the speed of the object exceeds the threshold speed, determining a region of interest (ROI) of the image sensor expected to represent the object. The method further includes causing the image sensor to generate one or more ROI images using the ROI.

A transfer control device includes a difference identifying section which identifies, for a first and second images sequentially captured by synchronous scanning, a difference region of the second image, on the basis of an event signal indicating a change in intensity of light generated in one or a plurality of pixels of each of the first and second images during a time period from capturing of the first image to capturing of the second image; and a transfer control section which executes data transfer different between the difference region and regions other than the difference region, for the second image.