Patent classifications
H04N25/74
PHOTOSENSITIVE SENSOR AND CORRESPONDING OPTICAL SIGNAL ACQUISITION METHOD
A photosensitive sensor is capable of operating in a global shutter mode and in a rolling shutter mode. The sensor includes at least one pixel with a photosensitive region configured to photogenerate charges. A first transfer gate is configured to transfer photogenerated charges from the photosensitive region to a transfer node. A source-follower transistor is configured to transmit a reading signal to a read node, in the global shutter mode, in a manner controlled by a potential of the photogenerated charges on the transfer node. A second transfer gate is configured to transfer the photogenerated charges from the photosensitive region to the read node in the rolling shutter mode.
READOUT ADDRESSING VERIFICATION SYSTEMS AND METHODS
Techniques for facilitating readout addressing verification systems and methods are provided. In one example, an imaging device includes a focal plane array (FPA). The FPA includes a detector array. The detector array includes detectors. Each detector is configured to detect electromagnetic radiation. The FPA further includes a readout circuit configured to perform a readout to obtain image data from each of the detectors. The imaging device further includes a processing circuit. The processing circuit is configured to apply, to the FPA, a plurality of control signals associated with a readout of a subset of the detectors. The processing circuit is further configured to generate a verification value based on the plurality of control signals. The processing circuit is further configured to perform a verification of the plurality of control signals based at least on the verification value. Related methods and systems are also provided.
READOUT ADDRESSING VERIFICATION SYSTEMS AND METHODS
Techniques for facilitating readout addressing verification systems and methods are provided. In one example, an imaging device includes a focal plane array (FPA). The FPA includes a detector array. The detector array includes detectors. Each detector is configured to detect electromagnetic radiation. The FPA further includes a readout circuit configured to perform a readout to obtain image data from each of the detectors. The imaging device further includes a processing circuit. The processing circuit is configured to apply, to the FPA, a plurality of control signals associated with a readout of a subset of the detectors. The processing circuit is further configured to generate a verification value based on the plurality of control signals. The processing circuit is further configured to perform a verification of the plurality of control signals based at least on the verification value. Related methods and systems are also provided.
IMAGE SENSOR
The present disclosure provides an image sensor, which includes: a pixel collection circuit array including a plurality of pixel collection circuits, each pixel collection circuit being configured to monitor a change in a light intensity in a field of view and enter a triggered state when the change in the light intensity meets a predetermined condition; a global control unit configured to reset the pixel collection circuit array when the image sensor is powered on, and control the pixel collection circuit array in a stable initial state to operate; a photo current detection unit configured to determine whether there is the change in the light intensity, and control an operating state of at least one pixel collection circuit in accordance with the detected change in the light intensity; and a reading unit configured to respond to the pixel collection circuit in the triggered state and output corresponding address information.
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1-I2-I3+I4. Note that the potential of the third wiring is changed by firstly inputting a reference potential to the third wiring and then inputting a potential based on internal data or a potential based on information obtained by a sensor.
PHOTOELECTRIC CONVERSION APPARATUS, IMAGE CAPTURING APPARATUS, EQUIPMENT, AND METHOD OF DRIVING PHOTOELECTRIC CONVERSION APPARATUS
A photoelectric conversion apparatus includes a driving unit and a plurality of pixels. The pixel includes a first photoelectric conversion unit, a second photoelectric conversion unit, a charge-voltage conversion unit, a first transfer transistor, a second transfer transistor, a reset transistor, a microlens configured to condense incident light to the first photoelectric conversion unit and the second photoelectric conversion unit, and an output unit. The driving unit performs a first operation including a first reset operation and a first readout operation, and a second operation including a second reset operation and a second readout operation.
Solid-state imaging apparatus and imaging apparatus
Time deviation between event detection and gradation acquisition is reduced. A solid-state imaging apparatus according to an embodiment includes: a pixel array unit (300) including a plurality of pixel blocks (310) arrayed in a matrix; and a drive circuit (211) that generates a pixel signal in a first pixel block in which firing of an address event has been detected among the plurality of pixel blocks, each of the plurality of pixel blocks including a first photoelectric conversion element (331) that generates an electric charge according to an amount of incident light, a detection unit (400) that detects the firing of the address event based on the electric charge generated in the first photoelectric conversion element, a second photoelectric conversion element (321) that generates an electric charge according to an amount of incident light, and a pixel circuit (322, 323, 324, 325, 326) that generates a pixel signal based on the electric charge generated in the second photoelectric conversion element.
SENSOR WITH LOW POWER SYNCHRONOUS READOUT
Various implementations disclosed herein include devices, systems, and methods that buffer events in device memory during synchronous readout of a plurality of frames by a sensor. Various implementations disclosed herein include devices, systems, and methods that disable a sensor communication link until the buffered events are sufficient for transmission by the sensor. In some implementations, the sensor using a synchronous readout may select a readout mode for one or more frames based on how many of the pixels are detecting events. In some implementations, a first mode that reads out only data for a low percentage of pixels that have events uses the device memory and a second mode bypasses the device memory based on accumulation criteria such as high percentage of pixels detecting events. In the second mode, less data per pixel may be readout.
SYSTEMS AND METHODS FOR GENERATING DEPTH MAPS USING A CAMERA ARRAYS INCORPORATING MONOCHROME AND COLOR CAMERAS
A camera array, an imaging device and/or a method for capturing image that employ a plurality of imagers fabricated on a substrate is provided. Each imager includes a plurality of pixels. The plurality of imagers include a first imager having a first imaging characteristics and a second imager having a second imaging characteristics. The images generated by the plurality of imagers are processed to obtain an enhanced image compared to images captured by the imagers. Each imager may be associated with an optical element fabricated using a wafer level optics (WLO) technology.
ACTIVE RESET CIRCUIT FOR RESET SPREAD REDUCTION IN SINGLE-SLOPE ADC
An image sensor comprises a pixel circuit including a reset transistor and configured to output a pixel signal; and a differential comparator including a pixel input, a reference input, and a comparator output, wherein one of a source or a drain of the reset transistor is connected to the comparator output. In this manner, an active reset method may be incorporated in the image sensor.