Techniques for detecting pulsed radiation. A CMOS sensor array being irradiated across at least a portion of the array with pulsed radiation is addressed using a rolling shutter operation. The sensor array is read to extract the integrated energy from each sensor element and convert the integrated energy into a pixel value for a pixel in a radiation image. A pulse detection operation is then applied to the radiation image to obtain a pulse repetition frequency of the pulsed radiation. The pulse detection operation includes of extracting a beat signal, calculating a beat frequency and peak to trough ratio from the beat signal, and determining the pulse repetition frequency therefrom. Particularly suited to the technical field of pulsed laser detection. Also relates to a pulse detector for the same.

The photoelectric conversion device includes a plurality of pixels, a plurality of signal lines, a pixel control unit that controls readout of signals from the pixels, a column circuit unit that generates pixel data from the signals read out from the pixels, and a signal processing unit configured to perform digital signal processing on the pixel data. The signal lines include first and second signal lines on the same column, and a period of reading out a signal from the first signal line and a period of reading out a signal from the second signal line overlap each other, and the signal processing unit includes a difference acquisition unit that acquires a difference value between a pixel data read out to the first signal line and a pixel data read out to the second signal line, and a correction unit that corrects the pixel data based on the difference value.

The photoelectric conversion device includes a plurality of pixels, a plurality of signal lines, a pixel control unit that controls readout of signals from the pixels, a column circuit unit that generates pixel data from the signals read out from the pixels, and a signal processing unit configured to perform digital signal processing on the pixel data. The signal lines include first and second signal lines on the same column, and a period of reading out a signal from the first signal line and a period of reading out a signal from the second signal line overlap each other, and the signal processing unit includes a difference acquisition unit that acquires a difference value between a pixel data read out to the first signal line and a pixel data read out to the second signal line, and a correction unit that corrects the pixel data based on the difference value.

The present technology relates to a solid-state imaging device, a driving method, and an electronic device capable of suppressing leakage of charge from PD to FD. In a solid-state imaging device according to an aspect of the present technology, in a case where the charge is read out from a selected photoelectric conversion unit as a charge readout target out of the plurality of photoelectric conversion units sharing the shared holding unit to the shared holding unit, a drive control unit applies a first pulse to the readout unit that corresponds to the selected photoelectric conversion unit, and applies a second pulse having a polarity opposite to a polarity of the first pulse and having a pulse period overlapping with at least a portion of the pulse period of the first pulse, to a site coming into a capacitive coupling state with the shared holding unit. The present technology is applicable to a back-illumination CMOS image sensor, for example.

The present technology relates to a solid-state imaging device, a driving method, and an electronic device capable of suppressing leakage of charge from PD to FD. In a solid-state imaging device according to an aspect of the present technology, in a case where the charge is read out from a selected photoelectric conversion unit as a charge readout target out of the plurality of photoelectric conversion units sharing the shared holding unit to the shared holding unit, a drive control unit applies a first pulse to the readout unit that corresponds to the selected photoelectric conversion unit, and applies a second pulse having a polarity opposite to a polarity of the first pulse and having a pulse period overlapping with at least a portion of the pulse period of the first pulse, to a site coming into a capacitive coupling state with the shared holding unit. The present technology is applicable to a back-illumination CMOS image sensor, for example.

A photoelectric conversion apparatus includes A/D conversion circuits configured to generate digital data by A/D-converting, during an A/D conversion period, analog signals read out from pixel circuits; memory circuits configured to store the digital data, output circuits each connected to at least two memory circuits among the memory circuits, and a scanning circuit configured to select one of the output circuits and select one of the at least two memory circuits connected to the selected output circuit, thereby reading out the digital data. The scanning circuit is configured not to change the selection of the output circuit during a prohibition period including at least a period until 0.65T elapses after a lapse of 0.35T since a start of the A/D conversion period where T represents a length of the A/D conversion period.

A photoelectric conversion apparatus includes A/D conversion circuits configured to generate digital data by A/D-converting, during an A/D conversion period, analog signals read out from pixel circuits; memory circuits configured to store the digital data, output circuits each connected to at least two memory circuits among the memory circuits, and a scanning circuit configured to select one of the output circuits and select one of the at least two memory circuits connected to the selected output circuit, thereby reading out the digital data. The scanning circuit is configured not to change the selection of the output circuit during a prohibition period including at least a period until 0.65T elapses after a lapse of 0.35T since a start of the A/D conversion period where T represents a length of the A/D conversion period.

An image sensor including: a pixel array including pixels each pixel including a photoelectric conversion element, a transmission transistor to transmit photocharges generated by the photoelectric conversion element to a floating diffusion node, and a reset transistor to reset the floating diffusion node based on a pixel power voltage; and a row driver to control the pixels, wherein the row driver includes a transmission control signal generator to provide a transmission control signal to the transmission transistor, wherein the transmission control signal generator includes: a first transistor to which a first voltage is applied; a second transistor connected to the first transistor; a third transistor to which a second voltage is applied, the second voltage being higher than the first voltage; and a fourth transistor connected to the third transistor, wherein an ON resistance of the second transistor is different from an ON resistance of the first transistor.

A photodetection device of the present disclosure includes: multiple AD converters provided for respective pixel columns of multiple pixels and performing AD conversion on a pixel signal based on a second output signal, and including a comparison circuit, which includes a first-stage amplifier circuit outputting a first output signal corresponding to a comparison operation based on the pixel signal and a reference signal, and a second-stage amplifier circuit coupled to the first-stage amplifier circuit and outputting the second output signal corresponding to the first output signal; multiple clamp circuits provided for the comparison circuit of each of the AD converters, and each including a switch controlled on and off based on a clamp control signal, in which the clamp circuits selectively clamp a voltage of the second output signal by turning on the switch; and a control signal generator generating the clamp control signal for each of the clamp circuits.

In an embodiment, a method of reducing resistance-capacitance delay along photodiode transfer lines of an image sensor includes forking a plurality of photodiode transfer lines each into a plurality of sublines coupled together and to a first decoder-driver at a first end of each subline; and distributing selection transistors of a plurality of multiple-photodiode cells among the plurality of sublines. In embodiments, the sublines may be recombined at a second end of the sublines and driven by a second decoder-driver at the second end.