To reduce power consumption of a driver circuit used in a vertical drive circuit of an image processing device.

In the driver circuit, a drive signal output circuit outputs a drive signal in accordance with a predetermined trigger signal. Furthermore, at a time of rising of the drive signal, a step-up switch sequentially selects a plurality of voltages in ascending order, and supplies the selected voltage to the drive signal output circuit. Moreover, at a time of falling of the drive signal, a step-down switch sequentially selects a plurality of voltages in descending order, and supplies the selected voltage to the drive signal output circuit.

An image sensor includes a pixel array including a first pixel and a second pixel which are connected to a same column line, the first pixel including 2N sub-pixels sharing a first floating diffusion node and the second pixel including 2N sub-pixels sharing a second floating diffusion node, wherein N is a positive integer greater than or equal to two, a timing generator configured to change a reset order and a readout order of 4N sub-pixels included in the first pixel and the second pixel, according to an exposure time setting value, and output a row address according to the changed orders, and a row driver configured to drive the pixel array based on the row address.

A signal processing device according to the present technology includes a multistage-branching-wired-line unit that supplies the same signal to a plurality of target elements via multistage-branched wired lines, and a logic circuit arranged at each of stages of the multistage-branching-wired-line unit, in which the wired lines in at least a certain space between the stages in the multistage-branching-wired-line unit cross each other.

An image sensor including: a pixel array including first and second pixels connected to a column line; a row driver to provide the first pixel with a first selection signal based on a clamp voltage, and to provide the second pixel with a second selection signal based on a selection voltage, wherein the first pixel outputs a first output voltage in response to the first selection signal, and the second pixel outputs a second output voltage in response to the second selection signal, wherein the first and second output voltages are output as a pixel signal through the column line, wherein a voltage of the pixel signal corresponds to a voltage obtained by clamping the second output voltage with the first output voltage, and wherein a change in a voltage level of the first output voltage due to a temperature is compensated for b the clamp voltage.

A solid-state imaging device includes: pixels disposed in a matrix of pixel rows and pixel columns; control wires provided for the pixel rows or the pixel columns, and each connected to at least two pixels out of the pixels, the at least two pixels being included in one of the pixel rows or the pixel columns for which the control wire is provided; drive circuits that are provided for the control wires, each include buffer elements in at least two stages, and each output a control signal to one of the control wires for which the drive circuit is provided, the buffer elements in the at least two stages being connected in series; and a first wire that short-circuits output wires of the buffer elements in one of the at least two stages in at least two of the plurality of drive circuits.

To improve the frame rate in an imaging apparatus that carries out still image recording and moving image display simultaneously. A pixel array includes an arrangement of a plurality of pixels. The plurality of pixels each include an internal memory. An exposure control unit carries out first exposure control in which captured data obtained by performing exposure to all the plurality of pixels together is retained in the internal memories of the pixels. The exposure control unit also carries out second exposure control in which captured data obtained by performing exposure to specific pixels of the plurality of pixels together is retained in the internal memories of the pixels.

An apparatus includes a pixel unit including a plurality of pixels arranged in a plurality of rows and each including a quench element of which a control node a signal defining a start and an end of an exposure period is input to and a photodiode connected to the quench element, a scan unit that scans the pixel unit by performing processing of reading signals of the pixels, processing of starting the exposure period, and processing of ending the exposure period on the plurality of rows sequentially in units of one row or two or more rows, and a control unit that outputs a synchronization signal to the scan unit to control a timing of the reading processing, wherein at least one of a timing of the start processing and a timing of the end processing is controlled by another control signal different from the synchronization signal.

A device includes a pixel unit, a selection unit, and a first generation unit. The pixel unit has a plurality of pixels arranged in a plurality of rows. Each pixel includes a quenching circuit configured to receive a signal for determining start and end of an exposure period and a photodiode coupled to the quenching circuit. The selection unit is configured to simultaneously receive a plurality of clock signals of different periods and select a clock signal to be outputted from the plurality of clock signals. The first generation unit is configured to generate the signal by using the outputted clock.

Reference clock CMOS input buffer with self-calibration and improved ESD performance. In one embodiment, a reference clock input buffer of an image sensor includes a Schmitt trigger configured to generate a clock signal having a falling edge and a rising edge. The falling edge and the rising edge are separated by a hysteresis voltage. The Schmitt trigger includes a plurality of output switches and a plurality of voltage control switches that are individually coupled to individual output switches [M2-i] of the plurality of output switches. Voltage of the falling edge signal or the rising edge signal of the Schmitt trigger is adjustable by selectively switching at least one voltage control switch of the plurality of voltage control switches.

Techniques for detecting pulsed radiation. A CMOS sensor array being irradiated across at least a portion of the array with pulsed radiation is addressed using a rolling shutter operation. The sensor array is read to extract the integrated energy from each sensor element and convert the integrated energy into a pixel value for a pixel in a radiation image. A pulse detection operation is then applied to the radiation image to obtain a pulse repetition frequency of the pulsed radiation. The pulse detection operation includes of extracting a beat signal, calculating a beat frequency and peak to trough ratio from the beat signal, and determining the pulse repetition frequency therefrom. Particularly suited to the technical field of pulsed laser detection. Also relates to a pulse detector for the same.