The present disclosure relates to a solid-state imaging device capable of receiving light entering a gap between pixel regions of imaging units by the pixel region when a plurality of imaging units is arranged, a method of manufacturing the same, and an electronic device. A CMOS image sensor includes a pixel region formed of a plurality of pixels. A convex lens is provided for each of a plurality of CMOS image sensors. A plurality of CMOS image sensors is arranged on a supporting substrate. The present disclosure is applicable to a solid-state imaging device and the like in which a plurality of CMOS image sensors is arranged on the supporting substrate, for example.

An optical sensor includes: a semiconductor layer including a first region, a second region, and a third region between the first region and the second region; a gate electrode facing to the semiconductor layer; a gate insulating layer between the third region and the gate electrode, the gate insulating layer including a photoelectric conversion layer: a signal detection circuit including a first signal detection transistor, a first input of the first signal detection transistor being electrically connected to the first region; a first transfer transistor connected between the first region and the first input; and a first capacitor having one end electrically connected to the first input. The signal detection circuit detects an electrical signal corresponding to a change of a dielectric constant of the photoelectric conversion layer, the change being caused by incident light.

A solid-state optical phase scanning array component is provided, including: a plurality of optical units, each of the optical units including a high dielectric constant layer, and a first electrode and a second electrode located on two sides of the high dielectric constant layer, the refractive index of each high dielectric constant layer being changeable as the power supply condition supplied to first and second electrodes is changed; and a lens unit, being disposed to face toward a light-exiting side of the plurality of optical units, and including a light-incident face and a light-exiting face, being configured to guide light beam incident from the light incident surface to the plurality of optical units to change the path of the light beam, and then the light beam emitting out from the light exiting surface.

A solid-state optical phase scanning array component is provided, including: a plurality of optical units, each of the optical units including a high dielectric constant layer, and a first electrode and a second electrode located on two sides of the high dielectric constant layer, the refractive index of each high dielectric constant layer being changeable as the power supply condition supplied to first and second electrodes is changed; and a lens unit, being disposed to face toward a light-exiting side of the plurality of optical units, and including a light-incident face and a light-exiting face, being configured to guide light beam incident from the light incident surface to the plurality of optical units to change the path of the light beam, and then the light beam emitting out from the light exiting surface.

An optical sensor including: a semiconductor layer including a source region and a drain region; a gate electrode facing a region between the source region and the drain region; a photoelectric conversion layer between the region and the gate electrode; and a first transistor having a first gate coupled to one of the source region and the drain region.

An image processing apparatus, which includes a first physical computing circuit, configured to receive a plurality of first analog signals output by an image sensor, and perform a convolution operation on the plurality of first analog signals to obtain a second analog signal. The plurality of first analog signals are in a one-to-one correspondence with a plurality of pieces of pixel data of a to-be-recognized image. The first physical computing circuit comprises at least one multiplication circuit array and at least one subtraction circuit, the at least one multiplication circuit array is in a one-to-one correspondence with the at least one subtraction circuit, a multiplication circuit in each multiplication circuit array comprises a differential pair transistor, each multiplication circuit array implements the convolution operation on the plurality of first analog signals using a plurality of multiplication circuits and a corresponding subtraction circuit.

An image acquisition system 1 includes: a light source 3 which outputs illumination light; an optical scanner 7 which scans a sample S with the illumination light; an optical scanner control unit 9; a detection optical system 15, 17 which focuses fluorescence from the sample S; an imaging device 19 which has a light receiving surface 19c in which a plurality of pixel rows 19d are arranged, and an imaging control section 19b, and which can perform signal readout of each of the plurality of pixel rows 19d from the light receiving surface 19c; and a calculation unit 21 which calculates an interval of signal readout between adjacent pixel rows 19d, based on a moving speed of an illuminated region on the light receiving surface 19c; the imaging control section 19b controls signal readout of each pixel row 19d, based on the interval of the signal readout thus calculated.

A pixel cell, and a method of use thereof, the pixel cell including: an output, a photosensor configured to generate a first measuring current in a first measurement cycle and a second measuring current in a second measurement cycle as a function of radiation, an output node, a power storage device configured so that in a first operating mode a current can be injected by the power storage device as a function of the first measuring current, and so that in a second operating mode the power storage device is configured to hold the injected current so that the injected current can be detected at the output node, and a switching unit configured to form a difference between the injected current and the second measuring current at the output node in a reading cycle and to couple the output node to the output.

An image processing apparatus, which includes a first physical computing circuit, configured to receive a plurality of first analog signals output by an image sensor, and perform a convolution operation on the plurality of first analog signals to obtain a second analog signal. The plurality of first analog signals are in a one-to-one correspondence with a plurality of pieces of pixel data of a to-be-recognized image. The first physical computing circuit comprises at least one multiplication circuit array and at least one subtraction circuit, the at least one multiplication circuit array is in a one-to-one correspondence with the at least one subtraction circuit, a multiplication circuit in each multiplication circuit array comprises a differential pair transistor, each multiplication circuit array implements the convolution operation on the plurality of first analog signals using a plurality of multiplication circuits and a corresponding subtraction circuit.

An image acquisition system 1 includes: a light source 3 which outputs illumination light; an optical scanner 7 which scans a sample S with the illumination light; an optical scanner control unit 9; a detection optical system 15, 17 which focuses fluorescence from the sample S; an imaging device 19 which has a light receiving surface 19c in which a plurality of pixel rows 19d are arranged, and an imaging control section 19b, and which can perform signal readout of each of the plurality of pixel rows 19d from the light receiving surface 19c; and a calculation unit 21 which calculates an interval of signal readout between adjacent pixel rows 19d, based on a moving speed of an illuminated region on the light receiving surface 19c; the imaging control section 19b controls signal readout of each pixel row 19d, based on the interval of the signal readout thus calculated.