The invention relates to an interconnection network for forward error correction encoders and decoders, including N input terminals, N output terminals, and M stages. Each stage includes switching elements having input pins and output pins. The input pins of the switching elements of the first stage are connected to the input terminals, and the output pins of the switching elements of the last stage are connected to the output terminals. The input and output pins of the switching elements of immediately successive stages are connected in a hardwired fashion so as to form a plurality of interconnection sub-networks for routing respective input values from respective output pins of the switching elements of the first stage to respective input pins of the switching elements of the last stage.

A datacenter is represented by a datacenter model including instances of data object instances that represent ports of endpoints, intermediate ports of network components, and cross-connects between ports. In response to receiving specification of a source and destination endpoint, a computer system identifies a path through the data center according to the datacenter model. The path may be identified from among a plurality of candidate paths through the datacenter according to one or more criteria such as speed, capacity, quality, and path length. The path may be output to an operator for implementation and may then be tested. Cross-connects added according to the path may then be added to the datacenter model.

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

The invention relates to an interconnection network for forward error correction encoders and decoders, including N input terminals, N output terminals, and M stages. Each stage includes switching elements having input pins and output pins. The input pins of the switching elements of the first stage are connected to the input terminals, and the output pins of the switching elements of the last stage are connected to the output terminals. The input and output pins of the switching elements of immediately successive stages are connected in a hardwired fashion so as to form a plurality of interconnection sub-networks for routing respective input values from respective output pins of the switching elements of the first stage to respective input pins of the switching elements of the last stage. The interconnection network is operable to route, on the basis of routing commands applied to the switching elements, N input values received at the N input terminals through the M stages and the interconnection sub-networks to provide, at the N output terminals, N output values corresponding to, or circularly shifted with respect to, said N input values received at the N input terminals. Additionally, M denotes a number of given submultiples of N whose product is equal to N. Each stage is associated with a respective submultiple of said M given submultiples of N, and includes S.sub.i switching elements, each having sm.sub.i respective input pins and sm.sub.i respective output pins, wherein S.sub.i=N/sm.sub.i, wherein sm.sub.i denotes the respective submultiple associated with the stage, and wherein i denotes the stage and is a positive integer comprised between one and M.

A datacenter is represented by a datacenter model including instances of data object instances that represent ports of endpoints, intermediate ports of network components, and cross-connects between ports. In response to receiving specification of a source and destination endpoint, a computer system identifies a path through the data center according to the datacenter model. The path may be identified from among a plurality of candidate paths through the datacenter according to one or more criteria such as speed, capacity, quality, and path length. The path may be output to an operator for implementation and may then be tested. Cross-connects added according to the path may then be added to the datacenter model.

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

A network element is provided comprising at least one switch, which is configurable to connect a subscriber line to a first service line or to a second service line, wherein the connection of the subscriber line to the first service line or to the second service line is configured via a signal conveyed across the second service line. Also, a system is suggested comprising two or more switches, wherein each switch is configurable to connect a subscriber line to a first service line or to a second service line, a control circuitry for controlling the two or more switches, an MSAN comprising two or more second service lines, wherein a dedicated service line of an MSAN is used for controlling the control circuitry. Further, methods for operating the network element or the system are suggested.