Patent classifications
H04Q2213/13305
Asymmetric chip-to-chip interconnect
Methods and apparatuses to transfer data between a first device and a second device are disclosed. In various embodiments, an apparatus includes a first device and a second device. The first device includes at least one first non-differential transmitter coupled to a first channel, at least one second non-differential transmitter coupled to a second channel, and at least one differential receiver to receive a data bit and its complement on the first and second channels in parallel. The second device includes at least one first non-differential receiver coupled to the first channel, at least one second non-differential receiver coupled to the second channel, and at least one differential transmitter to transmit a data bit and its complement on the first and second channels in parallel. Other methods and apparatuses are disclosed.
Method for calibration of a system with time-multiplexed sensors
A sense channel signal processing block is time-domain multiplexed among multiple MEMS devices and utilizes an anti-aliasing filter disposed after track-and-hold switches, to prevent the bandwidth of the sense channel from being limited by the anti-aliasing filter. A multiplexed signal processor architecture performs dynamic calibration of all sensor error signals in response to environmental changes.
ASYMMETRIC CHIP-TO-CHIP INTERCONNECT
Methods and apparatus to transfer data between a first device and a second device, is disclosed. An apparatus according to various embodiments may comprise a first device and a second device. The first device may comprise at least one first non-differential transmitter coupled to a first channel, at least one second non-differential transmitter coupled to a second channel, and at least one differential receiver to receive a data bit and its complement on the first and second channels in parallel. The second device may comprise at least one first non-differential receiver coupled to the first channel, at least one second non-differential receiver coupled to the second channel, and at least one differential transmitter to transmit a data bit and its complement on the first and second channels in parallel.
Asymmetric chip-to-chip interconnect
Methods and apparatus apparatuses to transfer data between a first device and a second device are disclosed. In various embodiments, an apparatus includes a first device and a second device. The first device includes at least one first non-differential transmitter coupled to a first channel, at least one second non-differential transmitter coupled to a second channel, and at least one differential receiver to receive a data bit and its complement on the first and second channels in parallel. The second device includes at least one first non-differential receiver coupled to the first channel, at least one second non-differential receiver coupled to the second channel, and at least one differential transmitter to transmit a data bit and its complement on the first and second channels in parallel. Other methods and apparatuses are disclosed.