Patent classifications
H04Q2213/13322
Angled Faceplates for a network element
A module for a networking node is disclosed. The module includes a Printed Circuit Board (“PCB”); one or more circuits mounted to the PCB; and a faceplate that including a plurality of plates, angled relative to one another, such that the faceplate includes increased surface area relative to a substantially flat faceplate, wherein at least two plates of the plurality of plates include physical ports each having track lengths to a circuit of one or more circuits, wherein one or more of the physical ports support signals at a rate of at least 100 Gbps. Each plate of the plurality of plates can be flat. Any of the plurality of plates can include physical ports. The physical ports can be pluggable modules. Each type of the physical ports can be a same type on a given plate.
Angled faceplates for a network element
A module for a networking node is disclosed. The module includes a Printed Circuit Board (“PCB”), one or more circuits mounted to the PCB and a faceplate. The faceplate includes a middle plate, a first side plate, and a second side plate. The first side plate extends from the middle plate at an obtuse angle relative to the middle plate towards a first side and back of the module. The second side plate extends from the middle plate, opposite to the first side plate, at an obtuse angle relative to the middle plate towards a second side and the back of the module.
Signal Distribution System Cascadable AGC Device and Method
A cascadable AGC amplifier in a signal distribution system includes a low noise cascadable amplifier having a through path and a cascadable output. The cascadable amplifier is also configured to provide AGC over a predetermined input power range. The cascadable AGC amplifier can be configured to provide gain or attenuation. When the cascadable AGC amplifier is implemented in a signal distribution system, typically as part of a signal distribution device, an input signal can be gain controlled and supplied to multiple signal paths without distortion due to degradation of signal to noise ratio or distortion due to higher order amplifier products. The distributed signal is not significantly degraded by distortion regardless of the number of cascadable AGC amplifiers connected in series or the position of the cascadable AGC amplifier in the signal distribution system.
ROUTING INTEGRATED CIRCUIT ELEMENT
A routing integrated circuit element is disclosed. The routing integrated circuit element is connected between a first and a second electronic module and includes a body, a first, and a second buffer element. A first side of the body is connected to the first electronic module. A second side is connected to the second electronic module and located on a different side from the first side. The distance between the second side and the second electronic module is shorter than the distance between the second side and the first electronic module. The first buffer element transmits an electronic signal from the first side to the second side. The second buffer element transmits the electronic signal from the second side to the first side, wherein the transmission directions of the electronic signals transmitted by the first buffer element and the second buffer element are opposite.
Angled Faceplates for a network element
A module for a networking node is disclosed. The module includes a Printed Circuit Board (“PCB”), one or more circuits mounted to the PCB and a faceplate. The faceplate includes a middle plate, a first side plate, and a second side plate. The first side plate extends from the middle plate at an obtuse angle relative to the middle plate towards a first side and back of the module. The second side plate extends from the middle plate, opposite to the first side plate, at an obtuse angle relative to the middle plate towards a second side and the back of the module.
Routing integrated circuit element
A routing integrated circuit element is disclosed. The routing integrated circuit element is connected between a first and a second electronic module and includes a body, a first, and a second buffer element. A first side of the body is connected to the first electronic module. A second side is connected to the second electronic module and located on a different side from the first side. The distance between the second side and the second electronic module is shorter than the distance between the second side and the first electronic module. The first buffer element transmits an electronic signal from the first side to the second side. The second buffer element transmits the electronic signal from the second side to the first side, wherein the transmission directions of the electronic signals transmitted by the first buffer element and the second buffer element are opposite.
Angled faceplates for a network element
A module for a networking node is disclosed. The module includes a Printed Circuit Board (PCB); one or more circuits mounted to the PCB; and a faceplate that including a plurality of plates, angled relative to one another, such that the faceplate includes increased surface area relative to a substantially flat faceplate, wherein at least two plates of the plurality of plates include physical ports each having track lengths to a circuit of one or more circuits, wherein one or more of the physical ports support signals at a rate of at least 100 Gbps. Each plate of the plurality of plates can be flat. Any of the plurality of plates can include physical ports. The physical ports can be pluggable modules. Each type of the physical ports can be a same type on a given plate.
Communication processing device, communication method, and communication system
Provided are a communication processing device and a communication system, capable of securely updating a communication protocol process with a simple configuration and technique, while continuing communication. A communication processing device, which is connected to a communication network, includes a programmable logic device in which partial rewriting of a logic circuit is possible, during an operation of a host device in the communication network, in which the programmable logic device includes at least two communication processing circuits of which each performs a communication protocol process, and in which one communication processing circuit is operable due to switching, a first communication processing circuit performs communication, and a second communication processing circuit is on standby, updating means for downloading logic circuit data of an updated communication protocol process, from the communication network, and performing a circuit configuration for the second communication processing circuit, a flag that indicates whether or not the circuit configuration for the second communication processing circuit is finished, and by which a circuit configuration state is able to be read to the host device side through communication, and a register that is intended for switching to any one communication processing circuit to be used, and is writable from the host device side through communication.
Communication Processing Device, Communication Method, and Communication System
Provided are a communication processing device and a communication system, capable of securely updating a communication protocol process with a simple configuration and technique, while continuing communication. A communication processing device, which is connected to a communication network, includes a programmable logic device in which partial rewriting of a logic circuit is possible, during an operation of a host device in the communication network, in which the programmable logic device includes at least two communication processing circuits of which each performs a communication protocol process, and in which one communication processing circuit is operable due to switching, a first communication processing circuit performs communication, and a second communication processing circuit is on standby, updating means for downloading logic circuit data of an updated communication protocol process, from the communication network, and performing a circuit configuration for the second communication processing circuit, a flag that indicates whether or not the circuit configuration for the second communication processing circuit is finished, and by which a circuit configuration state is able to be read to the host device side through communication, and a register that is intended for switching to any one communication processing circuit to be used, and is writable from the host device side through communication.