Patent classifications
H05B41/2824
N-SINE WAVE INVERTER
An inverter producing an alternating current from a direct current source has a primary stage coupled to the direct current source having a step-up transformer, a first switching circuit coupling the direct current to the transformer primary and a rectifier coupled to a secondary of the transformer for producing a DC voltage; a controller for the first switching circuit providing pulse drive signals to control switches of the first switching circuit to cause current to flow in the transformer primary and induce an alternating current in the transformer secondary; a secondary stage receiving the DC voltage having a second switching circuit and a controller for the second switching circuit for generating control signals to cause current through the second switching circuit to flow in alternate directions thorough the load. In one embodiment the alternating current period is divided into time slices and the switches of the first switching circuit are duty cycle modulated at different duty cycles in each time slice. A second embodiment switches series-connected primary windings of a multi-tap transformer.
Enhanced variable control, current sensing drivers with zeta scan
An electronic lighting system with a driver includes transformers that are dedicated to particular lamp receptacles that include interloper diode and resistor sets that fine tune the functioning of the driver. A buck converter and power factor correction, and a zeta scan are included. A comparator circuitry receives an external control signal and compares it to feedback from the output side of the circuitry, and thereby controls a Pulse Width Modulation (PWM) circuitry, which cooperates with feedback-based MOSFETs and a MOSFET gate driver circuit. This aids in dimming capabilities, recognizes and corrects for outages and recognizes and corrects for changes in the different size lamps that a user may install.
CONVERTER WITH CONTROL LOOP
Converters (1) comprise switches (14) for in response to control signals controlling amplitudes of converter output signals and comprise control loops for in response to detections of the amplitudes of the converter output signals producing the control signals. The control loops comprise circuits (21-23) for in response to simple detections of the amplitudes counting a first number of first time-intervals for which the amplitudes are above or below reference amplitudes, for transforming counting results into the control signals having control values, and for in response to the first number of first time-intervals being equal to/larger than a reference number overruling the control values and producing control signals having first or second limit values. Complex detections of the amplitudes are no longer necessary. Simple detectors (3, 4) may detect the amplitudes of the output signals and amplitudes or phases of input signals or rectified versions thereof and produce binary signals destined for binary inputs of micro-controllers (2) comprising the circuits (21-23).
Converter with control loop
Converters (1) comprise switches (14) for in response to control signals controlling amplitudes of converter output signals and comprise control loops for in response to detections of the amplitudes of the converter output signals producing the control signals. The control loops comprise circuits (21-23) for in response to simple detections of the amplitudes counting a first number of first time-intervals for which the amplitudes are above or below reference amplitudes, for transforming counting results into the control signals having control values, and for in response to the first number of first time-intervals being equal to/larger than a reference number overruling the control values and producing control signals having first or second limit values. Complex detections of the amplitudes are no longer necessary. Simple detectors (3, 4) may detect the amplitudes of the output signals and amplitudes or phases of input signals or rectified versions thereof and produce binary signals destined for binary inputs of micro-controllers (2) comprising the circuits (21-23).
N-sine wave inverter
An inverter producing an alternating current from a direct current source has a primary stage coupled to the direct current source having a step-up transformer, a first switching circuit coupling the direct current to the transformer primary and a rectifier coupled to a secondary of the transformer for producing a DC voltage; a controller for the first switching circuit providing pulse drive signals to control switches of the first switching circuit to cause current to flow in the transformer primary and induce an alternating current in the transformer secondary; a secondary stage receiving the DC voltage having a second switching circuit and a controller for the second switching circuit for generating control signals to cause current through the second switching circuit to flow in alternate directions thorough the load. In one embodiment the alternating current period is divided into time slices and the switches of the first switching circuit are duty cycle modulated at different duty cycles in each time slice. A second embodiment switches series-connected primary windings of a multi-tap transformer.
Digital controller for an electronic ballast
Provided are circuits and methods for a digital controller for an electronic ballast for a fluorescent lamp, comprising a feed-forward loop that provides information about a voltage firing angle, and a pulse width modulator that controls a duty ratio of at least one power switch of the electronic ballast according to the information. The digital controller may include a duty ratio controller implemented in the pulse width modulator. The digital controller may include one or more functions such as dimming, maintaining high power factor throughout the dimming range, low lamp power detection, lamp soft-start, and DC-link capacitor over-voltage detection for end of life protection or lamp failure protection. In one embodiment the ballast is a single stage, single switch ballast.