The circuit board according to the present invention includes a wiring portion and a non-wiring portion, the wiring portion having a metal layer and a resin layer, the non-wiring portion having a resin layer, the resin layer at a frequency 10 GHZ having a relative permittivity of from 2 to 3 at 23° C., and the circuit hoard satisfying a relationship: (A−B)/B≤0.1 wherein A is the maximum value of the thickness in the wiring portion (μm) and B is the minimum value of the thickness in the non-wiring portion (μm).

A method for manufacturing a flexible circuit board capable of transmitting high frequency signals with reduced attenuation includes providing an inner wiring board including a first conductive wiring layer and a first substrate layer, the first conductive wiring layer including a signal line and two ground lines on both sides of the signal line, the first substrate layer covering a side of the first conductive wiring layer and defining first through holes which expose the signal line; providing two copper clad laminates including a second substrate layer and a copper foil, the second substrate layer having second through hole aligned with the first through holes; laminating the two copper clad laminates onto two sides of the inner wiring board via two adhesive layers, each adhesive layer defining third through holes aligned with the first and second through holes; and forming a second conductive wiring layer from the copper foil.

An electronic device includes a circuit board and an electric element mounted on the circuit board. The electric element includes a multilayer body made of electrically insulating base materials, a transmission line portion, and connection portions. The transmission line portion and the connection portions are provided in the multilayer body. Each of the connection portions is continuous with a corresponding portion of the transmission line portion, and is connected to the circuit board by an electrically conductive bonding material. The transmission line portion other than the connection portions is not electrically connected to an electronic component on the circuit board. The electronic component not electrically connected to the electric element is disposed between the transmission line portion of the electric element and the circuit board.

A component carrier includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. The at least one electrically conductive layer structure includes a first trace. A tapering trench is formed in the at least one electrically insulating layer structure beside and below the first trace. A method of manufacturing the component carrier is also described.

Described herein are dielectric polymer films and printed circuit boards, such as multilayer and high-density interconnect printed circuit board comprising at least one dielectric polymer film.

The present invention relates to a phosphazene compound containing an ester group having a structure of formula (I). The present invention grafts ester groups to phosphazene compounds and makes terminal grafted hydroxyl and carboxyl groups reacted with polymer matrix, producing an improvement of flame retardancy and a reduction of dielectric constant at the same time when the phosphazene compound is introduced into polymer matrix. Since N and P atoms are directly bonded into the polymer matrix by a reaction rather than addition and combination means in the prior art, there is no reduced mechanical properties of the matrix due to the addition of flame retardants.

[Problem] To achieve a wiring board capable of suppressing the difference in the amount of delay between two signal wirings constituting differential signal wirings, while securing flexibility in design.

[Solution] A wiring board is configured to include a first insulating layer 1, a first signal wiring 2 and a second signal wiring 3. The first insulating layer 1 includes fibers 4 having the long axis in a first direction and aligned approximately parallel to each other at a first interval and an insulating material 5 filling gaps between the fibers 4 of the first direction. The first signal wiring 2 is formed approximately parallel to the first direction on the first insulating layer 1. The second signal wiring 3 is formed parallel to the first signal wiring 2 such that the interval between the first and second signal wirings 2 and 3 be approximately an integral multiple of the first interval, and the second signal wiring 3 transmits a differential signal of a signal transmitted on the first signal wiring 2.

A glass substrate for a high-frequency device, which contains SiO.sub.2 as a main component, the glass substrate having a total content of alkali metal oxides in the range of 0.001-5% in terms of mole percent on the basis of oxides, the alkali metal oxides having a molar ratio represented by Na.sub.2O/(Na.sub.2O+K.sub.2O) in the range of 0.01-0.99, and the glass substrate having a total content of alkaline earth metal oxides in the range of 0.1-13% in terms of mole percent on the basis of oxides, wherein at least one main surface of the glass substrate has a surface roughness of 1.5 nm or less in terms of arithmetic average roughness Ra, and the glass substrate has a dielectric dissipation factor at 35 GHz of 0.007 or less.

A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.

A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 μm. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.