H05K1/03

LENS MODULE AND MANUFACTURING METHOD THEREOF
20230051039 · 2023-02-16 ·

A lens module and a manufacturing method of the lens module are provided. The manufacturing method includes the following steps. Firstly, a circuit substrate is provided. Then, an image sensor chip is placed on a top surface of the circuit substrate. Then, plural electrical connection paths are formed between the image sensor chip and the circuit substrate. Then, plural stacking spacer structures are formed on a top surface of the image sensor chip by a stacking process. Then, plural protective sidewalls are formed to cover the electrical connection paths. Then, a glass substrate is placed over the stacking spacer structures. Then, a lens holder structure is placed on a substrate top surface of the glass substrate directly. The glass substrate is supported by the stacking spacer structures. Consequently, the glass substrate can be maintained at the position over the image sensor chip.

CERAMIC CARRIER SUBSTRATE AND POWER MODULE
20230051374 · 2023-02-16 ·

A ceramic carrier substrate for an electrical/electronic circuit. The substrate includes ceramic layers arranged one above the other in an interconnected structure and conductor tracks arranged on and/or in individual ceramic layers and connected to one another as the conductor structure for the electrical/electronic circuit. The interconnected structure is formed by a firing operation. A first conductor substructure is formed in a first interconnected structure subassembly which comprises at least one of the ceramic layers, and a second conductor substructure is formed in a second interconnected structure subassembly which is directly adjacent to the first interconnected structure subassembly and comprises at least one of the ceramic layers. The second conductor substructure substantially consists of high-current conductor tracks and is configured to contact a power circuit. The first conductor substructure substantially consists of signal conductor tracks and is configured to contact a drive circuit for the power circuit.

ELECTRONIC CIRCUIT HAVING GRAPHENE OXIDE PAPER SUBSTRATE AND METHOD OF RECOVERING PARTS OF AN ELECTRONIC CIRCUIT
20230049337 · 2023-02-16 ·

There is described a method of recovering parts of an electronic circuit having a self-supporting substrate having graphene oxide (GO) paper, and at least a conductive trace on the self-supporting substrate. The method generally has a step of immersing the electronic circuit into an environment-friendly solvent, the GO paper thereby dissociating from the conductive trace; and a step of recovering the GO paper from the environment-friendly solvent. The present disclosure also describes an electronic circuit generally having a self-supporting substrate having GO paper with a structural thickness being equal or above a given thickness threshold; and at least a conductive trace on said self-supporting substrate. Further, there is also described a substrate for an electronic circuit in which the substrate generally has a self-supporting substrate having GO paper with a structural thickness being equal or above a given thickness threshold.

THERMOSETTING RESIN COMPOSITION AND PREPREG, LAMINATE AND PRINTED CIRCUIT BOARD USING SAME
20230045848 · 2023-02-16 ·

Provided are a thermosetting resin composition and a prepreg, laminate and printed circuit board using same. The thermosetting resin composition comprises a resin component, the resin component comprising a modified cyclic olefin copolymer having a structure as shown in formula I and another unsaturated resin. By introducing a methacrylate end group having a certain polarity into a cyclic olefin copolymer, a modified cyclic olefin copolymer is formed. The modified cyclic olefin copolymer can form a thermosetting material by means of cross-linking with itself or another unsaturated resin, whereby the bonding property can be significantly improved while retaining the excellent dielectric properties of the cyclic olefin copolymer itself. The laminate prepared using the thermosetting resin composition has good dielectric properties, a good peel strength and a good heat resistance, and can meet all the performance requirements for printed circuit board substrates in the current high-frequency and high-speed communication field.

PHOTOSENSITIVE RESIN COMPOSITION, PHOTOSENSITIVE RESIN FILM, MULTILAYERED PRINTED WIRING BOARD, SEMICONDUCTOR PACKAGE, AND METHOD FOR PRODUCING MULTILAYERED PRINTED WIRING BOARD

Provided is a photosensitive resin composition containing: a photopolymerizable compound (A) having an ethylenically unsaturated group; a photopolymerization initiator (B); and an inorganic filler (F), in which the photopolymerizable compound (A) having an ethylenically unsaturated group includes a photopolymerizable compound (A1) having an acidic substituent and an alicyclic structure together with an ethylenically unsaturated group, and the inorganic filler (F) includes an inorganic filler surface-treated with a coupling agent without at least one functional group selected from the group consisting of an amino group and a (meth)acryloyl group. The present disclosure also provides a photosensitive resin composition for photo via formation, and a photosensitive resin composition for interlayer insulating layer. The present disclosure further provides: a photosensitive resin film and a photosensitive resin film for interlayer insulating layer, each of which contains the photosensitive resin composition; a multilayered printed wiring board and a semiconductor package; and a method for producing a multilayered printed wiring board.

Circuit board

The circuit board according to the present invention includes a wiring portion and a non-wiring portion, the wiring portion having a metal layer and a resin layer, the non-wiring portion having a resin layer, the resin layer at a frequency 10 GHZ having a relative permittivity of from 2 to 3 at 23° C., and the circuit hoard satisfying a relationship: (A−B)/B≤0.1 wherein A is the maximum value of the thickness in the wiring portion (μm) and B is the minimum value of the thickness in the non-wiring portion (μm).

Prepreg for coreless substrate, coreless substrate and semiconductor package

The present invention provides a prepreg for a coreless substrate and a coreless substrate and a semiconductor package using the prepreg, which can satisfy heat resistance, low thermal expansion, and bonding strength with a metal circuit at a level required for the coreless substrate. Specifically, the prepreg for a coreless substrate contains a thermosetting resin composition containing (a) dicyandiamide, (b) an adduct of a tertiary phosphine and quinones, (c) an amine compound having at least two primary amino groups, and (d) a maleimide compound having at least two primary amino groups having at least two N-substituted maleimide groups. Instead of (c) the amine compound having at least two primary amino groups and (d) the maleimide compound, having at least two N-substituted maleimide groups, (X) an amino-modified polyimide resin obtained by reacting them may be used.

Thin film capacitor, circuit board incorporating the same, and thin film capacitor manufacturing method

Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.

Composite metal foil and preparation method thereof
11582869 · 2023-02-14 · ·

A composite metal foil and a preparation method thereof are provided. The composite metal foil includes a carrier layer, a barrier layer, a striping layer, and a metal foil layer. The carrier layer, the barrier layer, the striping layer, and the metal foil layer are sequentially stacked, the barrier layer includes a metal bonding layer and a high-temperature resistant layer stacked, and the metal bonding layer is disposed between the carrier layer and the high-temperature resistant layer. The striping layer is disposed between the carrier layer and the metal foil layer so as to facilitate peeling of the carrier layer, and the barrier layer is disposed between the carrier layer and the metal foil layer so as to prevent the carrier layer and the metal foil layer from diffusing mutually to cause bonding at a high temperature, so that the carrier layer and the metal foil layer are easy to peel off. In addition, the metal bonding layer is disposed between the carrier layer and the high-temperature resistant layer, so that the barrier layer is not easy to separate from the carrier layer, and peeling between the barrier layer and the carrier layer is prevented.

METHOD OF MANUFACTURING TEXTILES WITH INTEGRATED ELECTRICAL PATHS AND ELECTRONICS

Methods for manufacturing a textile article having conductive yarn and an integrated electronic device are disclosed. An embodiment of the method includes receiving computer-readable instruction indicative of a knitting pattern of the textile article. Based on the instructions, a textile is formed by knitting conductive yarn and non-conductive yarn. A weld is applied at a junction where two or more conductive paths meet to create a bond between the two or more conductive paths.