Prepregs having a UV curable resin layer located adjacent to a first thermally curable resin layer or sandwiched between first and second thermally curable resin layers wherein the UV curable resin layer is uncured or partially cured as well as methods for preparing laminates using the prepregs wherein the laminate includes at least one UV curable resin encapsulated electrical component.

A wiring substrate includes an insulating layer including resin and filler particles, and an embedded wiring layer including wirings and embedded in the insulating layer such that the wirings are filling grooves formed on a surface of the insulating layer, respectively. The embedded wiring layer is formed such that the inter-wiring distance between the closest two wirings of the wirings in the embedded wiring layer is in the range of 2 μm to 8 μm, and the insulating layer is formed such that the maximum particle size of the filler particles is 50% or less of the inter-wiring distance.

A wiring board includes a base material, a through hole that is formed in the base material, a magnetic member that is embedded in the through hole, and a plating film that covers end faces of the magnetic member exposed from the through hole. The magnetic member includes a conductor wire that is covered by a magnetic body. A wiring board manufacturing method includes forming a through hole in a base material, forming a magnetic member by covering a conductor wire by a magnetic body, embedding the magnetic member in the through hole, and forming a plating film that covers end faces of the magnetic member exposed from the through hole.

A cap including a side wall portion having conductivity, a lid portion, a thin portion formed at least around the lid portion, and a beam portion supporting the lid portion is formed, an exposed component and a sealing component are mounted on a module substrate, the cap is mounted on the module substrate so as to surround an exposed component, the sealing component and the cap are sealed with a sealing resin, the lid portion is ground so as to reduce its thickness until the thin portion disappears, a shield layer is formed on an outer surface of the sealing resin and a side surface of the module substrate, a translucent adhesive sheet is attached on a top surface of the sealing resin, the beam portion is cut by laser through the adhesive sheet, and the adhesive sheet is peeled together with a lid portion.

A power system includes a power module, an electronic load and a system board. The power module includes a first surface, a second surface, a switch and a plurality of conductive parts, wherein the switch is disposed on the first surface of the power module and the plurality of conductive parts are disposed on the second surface of the power module. The electronic load includes a plurality of conductive parts. The power module and the electronic load are disposed on two opposite sides of the system board, the power module delivers power to the electronic load through the system board, and gaps and networks of the plurality of conductive parts of the power module correspond to those of the plurality of conductive parts of the electronic load.

A component-embedded substrate includes: a plurality of insulating layers each including a wiring pattern formed on one surface; an embedded component including a connection terminal; and a plurality of vias that electrically connect the connection terminal to the wiring patterns adjacent to each other in a lamination direction. The plurality of insulating layers is laminated on the connection terminal. Each of the plurality of vias is composed of a via hole formed in the respective insulating layer of the plurality of the insulating layers and a conductive material provided in the via hole. One of the plurality of vias is a connection via directly connected to the connection terminal. Another of the plurality of vias is a first adjacent via adjacent to the connection via in the lamination direction. The first adjacent via is connected to the wiring pattern formed on a surface of a top insulating layer.

A package circuit structure includes a multilayer circuit board, an electronic component, and an insulating layer. The multilayer circuit board includes a metal portion and an opening. The opening is extending from a first side of the multilayer circuit board toward the second side of the multilayer circuit board facing the first side. A bottom of the opening is sealed by the metal portion. The electronic component is received in the opening and adhered to the metal portion. The electronic component is electrically connected to the multilayer circuit board and encapsulated in the opening by the insulating layer. A method for manufacturing the package circuit structure is also provided.

An electronic component module includes a substrate having a main surface, an electronic component mounted on the main surface, a sealing resin having an insulation property and covering the electronic component and the main surface, and a conductive film that covers an outer surface of the sealing resin. The electronic component includes a housing whose outer surface has an insulation property, and a first external electrode arranged at one end of the housing. The electronic component module includes a conductive auxiliary layer that covers a part of the first external electrode and a part of the housing on a side of the electronic component opposite to the substrate. The sealing resin has a recessed portion that exposes the conductive auxiliary layer. A conductive portion is formed in the recessed portion and is connected to the conductive film and the conductive auxiliary layer.

A wiring substrate includes an insulating layer including resin and filler particles, and an embedded wiring layer including wirings and embedded in the insulating layer such that the wirings are filling grooves formed on a surface of the insulating layer, respectively. The embedded wiring layer is formed such that the smallest line width of the wirings in the embedded wiring layer is in the range of 2 μm to 8 μm, and the insulating layer is formed such that the maximum particle size of the filler particles is 50% or less of the smallest line width of the wirings in the embedded wiring layer.

A package substrate according to an embodiment includes an insulating layer; a first outer circuit pattern disposed on an upper surface of the insulating layer; a second outer circuit pattern disposed under a lower surface of the insulating layer; a first connection portion disposed on an upper surface of a first-first circuit pattern of the first outer circuit pattern; a first contact portion disposed on the first connection portion; a first device disposed on the first connection portion through the first contact portion; a second contact portion disposed under a lower surface of a second-first circuit pattern of the second outer circuit pattern; a second device attached to the second-first circuit pattern through the second contact portion; and a second connection portion disposed under a lower surface of a second-second circuit pattern of the second outer circuit pattern; wherein the first connection portion is disposed with a first width and a first interval, and wherein the second connection portion is disposed with a second width greater than the first width and a second interval greater than the first interval.