A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.

A process for making a circuit board modifies a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and resin-rich surface removal operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.

This disclosure relates to materials prepared using a laser-direct structuring (LDS) method. The LDS materials of the present disclosure comprise polymeric film or polymeric sheet structures containing a LDS additive and which can undergo laser-direct structuring and chemical plating to form conductive paths on their surface. The present disclosure finds use, for example, in the automotive, electronics, RFID, communications, and medical device industries.

A package structure includes a substrate, a sensor, a base, a lead frame, conductive vias and patterned circuit layer. The substrate includes a component-disposing region and electrode contacts. The sensor is disposed at the component-disposing region and electrically connected to the electrode contacts. The base covers the substrate with its bonding surface and includes a receiving cavity, a slanted surface extended between a bottom surface of the receiving cavity and the bonding surface, and electrodes disposed on the bonding surface and electrically connected to the electrode contacts respectively. The sensor is located in the receiving cavity. The lead frame is disposed at the base. The conductive vias penetrates the base and electrically connected to the lead frame. The patterned circuit layer is disposed on the slanted surface and electrically connected to the conductive vias and the electrodes.

Light emitting diode (LED) based daylight running light (DRL) comprising a carrier, comprising a polymer composition comprising polyethylene terephthalate and glass fibers, the surface of the carrier comprises conductor tracks for mounting one or more LED's.

A component carrier for carrying electronic components, wherein the component carrier comprises an at least partially electrically insulating core, at least one electronic component embedded in the core, and a coupling structure with at least one electrically conductive through-connection extending at least partially therethrough and having a component contacting end and a wiring contacting end, wherein the at least one electronic component is electrically contacted directly to the component contacting end, wherein at least an exterior surface portion of the coupling structure has homogeneous ablation properties and is patterned so as to have surface recesses filled with an electrically conductive wiring structure, and wherein the wiring contacting end is electrically contacted directly to the wiring structure.

The present invention relates to a composition for forming a conductive pattern and a resin structure having a conductive pattern, wherein the composition makes it possible to form a fine conducive pattern on various polymer resin products or resin layers through a simple process, and can more effectively meet needs of the art, such as displaying various colors.

In some embodiments, a manufacturing process includes injection molding a palladium-catalyzed material into a substrate, forming a thin copper film over exterior and exposed surfaces of the substrate; ablating or removing copper film from the substrate to provide first, second and optional third portions of the copper film and ablated sections; electrolytically plating each portion to form metallic-plated portions; and ablating or removing the second portion in order to isolate the first portion. The metallic-plated first portion comprises a circuit portion of a molded interconnect device (MID), and where the metallic-plated third portion comprises a Faraday cage portion of a MID. A soft etching step may be included. A solder resist application step can be added, along with an associated solder resist removal step.

A circuit structure that comprises a substrate and one or more conductive elements disposed on the substrate is provided. The substrate comprises a polymer composition that comprises an electrically conductive filler distributed within a polymer matrix. The polymer matrix contains at least one thermoplastic high performance polymer having a deflection temperature under load of about 40° C. or more as determined in accordance with ISO 75-2:2013 at a load of 1.8 MPa, and the polymer composition exhibits a dielectric constant of about 4 or more and a dissipation factor of about 0.3 or less, as determined at a frequency of 2 GHz.