An integrated electro-optical circuit board comprises a first flexible substrate having a top side and a bottom side, at least one first optical circuit on the bottom side of the first flexible substrate connected to the top surface through a filled via, at least one first metal trace on the top side of the first flexible substrate, an optical adhesive layer connecting the bottom side of the first flexible substrate to a top side of a second flexible substrate, and at least one second metal trace on a bottom side of the second flexible substrate connected by a filled via through the second flexible substrate, the optical adhesive layer, and the first flexible substrate to the at least one first metal trace.

A display device is provided. The display device includes an auxiliary substrate, a display substrate, and a circuit board. The auxiliary substrate includes an auxiliary circuit. The display substrate is disposed on the auxiliary substrate. The display substrate includes a circuit. The circuit board is electrically connected to the auxiliary substrate. The circuit of the display substrate is electrically connected to the auxiliary circuit through a first conductive via, and the circuit board provides a signal to the auxiliary circuit.

A packaging method includes steps of: forming first and second wiring layers electrically connected to each other on two opposite surfaces of a substrate; then configuring mother substrate interconnecting bumps on the first wiring layer and along perimeter of a daughter substrate unit, and then cutting along the perimeter of the daughter substrate unit to expose lateral faces of the mother substrate interconnecting bumps and configuring solder materials thereon; then configuring first and second chips on the first and the second wiring layers to form electrical interconnection between the two chips. A package structure enables interconnecting two chips through one single daughter substrate unit with its wiring layers directly connecting with lateral face contacts of the mother carrier substrate through the mother substrate interconnecting bumps. Hence, area of the daughter substrate unit is reduced; lengths of the interconnection paths are shortened, and qualities of communication and space utilization are enhanced.

Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board, an electrical component mounted on a surface of the printed circuit board, and an interposer printed circuit board mounted on the surface of the printed circuit board. The interposer printed circuit board may comprise a first signal path to transmit a first electrical signal and a second signal path to transmit a second electrical signal that is different from the first electrical signal. The interposer printed circuit board may be configured to provide a standoff to prevent the electrical component from contacting a motherboard when the printed circuit board assembly is mounted to the motherboard.

An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.

A packaging method includes steps of: forming first and second wiring layers electrically connected to each other on two opposite surfaces of a substrate; then configuring mother substrate interconnecting bumps on the first wiring layer and along perimeter of a daughter substrate unit, and then cutting along the perimeter of the daughter substrate unit to expose lateral faces of the mother substrate interconnecting bumps and configuring solder materials thereon; then configuring first and second chips on the first and the second wiring layers to form electrical interconnection between the two chips. A package structure enables interconnecting two chips through one single daughter substrate unit with its wiring layers directly connecting with lateral face contacts of the mother carrier substrate through the mother substrate interconnecting bumps. Hence, area of the daughter substrate unit is reduced; lengths of the interconnection paths are shortened, and qualities of communication and space utilization are enhanced.

IC device assemblies including a power delivery bus board that is mounted to a primary PCB (i.e., motherboard) that further hosts a power-sink device and a power-source device. The bus board, as a secondary PCB, may be surface-mounted on a back side of the primary PCB opposite the power source and sink devices, which are mounted on the front side of the primary PCB. The bus board need only be dimensioned so as to bridge a length between first and second back-side regions of the primary PCB that are further coupled to a portion of the front-side pads employed by the power-sink device. The secondary PCB may be purpose-built for conveying power between the source and sink devices, and include, for example, short, wide traces, that may be formed from multiple heavyweight metallization layers.

Passive device assembly for accurate ground plane control is disclosed. A passive device assembly includes a device substrate conductively coupled to a ground plane separation control substrate. A passive device disposed on a lower surface of the device substrate is separated from an embedded ground plane mounted on a lower surface of the ground plane separation control substrate by a separation distance. The separation distance is accurately controlled to minimize undesirable interference that may occur to the passive device. The separation distance is provided inside the passive device assembly. Conductive mounting pads are disposed on the lower surface of the ground plane separation control substrate to support accurate alignment of the passive device assembly on a circuit board. By providing sufficient separation distance inside the passive device assembly, the passive device assembly can be precisely mounted onto any circuit board regardless of specific design and layout of the circuit board.

A housing has a first positioning hole that penetrates the housing in the vertical direction. A suction cap includes a suction plate part to be sucked by a suction nozzle, and a plurality of positioning protrusion parts, each of which is to be inserted into a first positioning hole of the housing of an input/output board-side connector and a CPU board-side connector in the state where the suction cap holds the input/output board-side connector and the CPU board-side connector. Each positioning protrusion part is inserted into each corresponding first positioning hole in the state where the suction cap holds the input/output board-side connector and the CPU board-side connector, which achieves the positioning of the input/output board-side connector and the CPU board-side connector with respect to the suction cap.

A manufacturing method of a semiconductor package is provided. The method includes: providing an initial rigid-flexible substrate, wherein the initial rigid-flexible substrate includes rigid structures and a flexible core laterally penetrating through the rigid structures, and further includes a supporting frame connected to the rigid structures; bonding a package structure onto the initial rigid-flexible substrate, wherein the package structure includes semiconductor dies and an encapsulant laterally surrounding the semiconductor dies; and removing the supporting frame.