Patent classifications
H05K2203/0228
DOUBLE-SIDED FLEXIBLE CIRCUIT BOARD
A double-sided flexible circuit board includes a flexible substrate, through circuit lines, first circuit lines and second circuit lines. The first circuit lines are formed on a top surface of the flexible substrate and each includes a first segment, a bent segment and a second segment. One end of the first segment is connected to a first connection end of one of the through circuit lines. Both ends of the bent segment are connected to the other end of the first segment and one end of the second segment, respectively. A second distance between the adjacent second segments is greater than a first distance between the adjacent first segments. The second circuit lines are formed on a bottom surface of the flexible substrate and each is connected to a second connection end of one of the through circuit lines.
SUBSTRATE CUTTING DEVICE AND SUBSTRATE CUTTING METHOD
A substrate cutting device includes: a first cutter including a plurality of first rotary blades; a second cutter including a plurality of second rotary blades; a first rotation drive unit for rotationally driving the first cutter; a second rotation drive unit for rotationally driving the second cutter; a cutter support unit; and a phase adjustment unit. The cutter support unit supports the first cutter and the second cutter such that the first and second cutters are radially opposed to each other so that rotation axes thereof are parallel to each other. The phase adjustment unit adjusts a phase of at least one of the first cutter and the second cutter such that each of the second rotary blades is located between two adjacent first rotary blades in an opposing area in which the first cutter and the second cutter are opposed to each other.
Semiconductor Device and Method of Forming PoP Semiconductor Device with RDL Over Top Package
A PoP semiconductor device has a top semiconductor package disposed over a bottom semiconductor package. The top semiconductor package has a substrate and a first semiconductor die disposed over the substrate. First and second encapsulants are deposited over the first semiconductor die and substrate. A first build-up interconnect structure is formed over the substrate after depositing the second encapsulant. The top package is disposed over the bottom package. The bottom package has a second semiconductor die and modular interconnect units disposed around the second semiconductor die. A second build-up interconnect structure is formed over the second semiconductor die and modular interconnect unit. The modular interconnect units include a plurality of conductive vias and a plurality of contact pads electrically connected to the conductive vias. The I/O pattern of the build-up interconnect structure on the top semiconductor package is designed to coincide with the I/O pattern of the modular interconnect units.
Component embedded in component carrier and having an exposed side wall
A component carrier including a stack with a plurality of electrically insulating layer structures and/or a plurality of electrically conductive layer structures, and a component embedded in the stack, wherein at least a portion of a side wall of the component is exposed.
Method of manufacturing component carrier and component carrier
A method of manufacturing component carriers is disclosed. The method includes providing a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, forming a first hole in a core of the stack and subsequently embedding a first component in the first hole, thereafter forming a second hole in the same core of the stack and subsequently embedding a second component in the second hole. A component carrier has a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A first hole is formed in a core of the stack. A first component is embedded in the first hole. A second hole is formed in the same core of the stack and subsequently a second component is embedded in the second hole.
DEVICE FOR TEMPERATURE MEASUREMENT
A device for current determination includes a shunt and a device for temperature measurement including a printed circuit board, an evaluation unit and a temperature sensor. The printed circuit board has a milled groove which runs spirally around the temperature sensor, so that the temperature sensor is arranged on a printed circuit board plateau defined by the milled groove and is displaceable in a direction that is parallel to a normal vector of a plane defined by the printed circuit board. When the temperature sensor is displaced relative to the plane of the printed circuit board, a restoring force is brought about between the printed circuit board and the temperature sensor, wherein the shunt includes a resistance region having a substantially flat surface, wherein the device for current determination is arranged in the resistance region on the surface of the shunt in such a way that the temperature sensor is arranged in thermal connection with the resistance region of the shunt, wherein voltage taps are arranged on both sides of the temperature sensor and electrically contact the surface of the shunt in order to detect a potential difference along the resistance region.
BOARD EDGE ELECTRICAL CONTACT STRUCTURES
A printed circuit board for mounting electrical components thereupon include: a first side; a second side opposite the first side; electrical connection points disposed on the surface of an exterior edge of the printed circuit board; and wherein the exterior edge of the printed circuit board is between the first side and the second side. Further a method of manufacturing a printed circuit board for mounting electrical components thereupon includes the steps of disposing interconnect structures within the printed circuit board adjacent to at least one edge of the printed circuit board; and removing material from the printed circuit board edge to expose the interconnect structures such that the exposed interconnect structures correspond to a component connection footprint.
Unit unloading system
An IC unit unloading system including a chute and a drawer. The chute has a plurality of channels each arranged to receive a unit. The drawer is arranged to move along the chute and has a gate with a unit contact face proximate a top surface of the chute. The contact face is arranged to draw the units along the respective channel as the drawer moves along the chute, and to allow the units to slide laterally across the contact face from a first pitch of each channel to a second pitch. A method for washing a plurality of PCB units, the method comprising the steps of: receiving a plurality of PCB units, said PCB units arranged with a bump face projecting downwards; washing the bump face of the PCB units, then; flipping the PCB units so as to project the ball face downwards, then; washing the ball face.
ELECTRONIC COMPONENT MODULE AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT MODULE
An electronic component module includes a plurality of components having terminals and arranged along a plane, a sealing resin portion that covers and seals these components and has a plane as one plane of an outer surface, and a shield layer that covers the outer surface of the sealing resin portion. Terminals of the plurality of components are exposed in a state of protruding from the plane of the sealing resin portion, and the terminals of these components protruding from the plane of the sealing resin portion are used as mounting terminals of the electronic component module.
Flexible film, flexible film package and method for manufacturing flexible film
Provided is a method for manufacturing a flexible film. The method for the manufacturing the flexible film includes providing a parent film on which a plurality of film areas are defined, each of which having a detection pattern formed thereon, applying a voltage to each of the film areas to detect whether a defect exists, removing the detection pattern from respective ones of the film areas on which the defect is detected, and cutting out others of the film areas on which the defect is not detected.