H05K2203/0475

Vertical soldering technology for 3D circuit assembly

A circuit assembly with an electrical connection between two individual Printed Circuit Boards (PCBs) or Circuit Card Assemblies (CCAs) that are vertically stacked with a connection formed entirely of solder and with a gap in between surfaces that components may occupy. Coalescing solder paste merges between the surfaces when it is in a liquid state to form a solder bridge. The resultant assembly can be encapsulated to form a solid monolithic electronic assembly to improve robustness and allow the assembly to better withstand compressive forces.

LASER SOLDERING METHOD AND DEVICE
20220320811 · 2022-10-06 ·

A hot wind is blown to a land and a lead from the underside of a printed board, to perform preheating. At the start of preheating or after start of preheating, a laser beam is applied to a soldering point, and meanwhile, wire solder is fed to a position contacting with the soldering point. The fed wire solder is melted by the laser beam. After soldering is finished, feeding of the wire solder is stopped. Application of the laser beam is stopped, to solidify the melted solder.

Flux residue detection

A system for flux residue detection is provided. The system includes a flux heater, where the flux heater controls a temperature of a flux spray applied to a printed circuit board, and an infrared camera, wherein the infrared camera provides a thermal image of the flux on the printed circuit board. A method, a computer system, and a computer program product for flux residue detection is provided, including setting flux application parameters, applying flux to a printed circuit board, and capturing an infrared image of the flux applied to the printed circuit board. A method, a computer system, and a computer program product for flux residue detection is provided, including setting flux application parameters, applying flux to a printed circuit board, capturing an infrared image of the flux applied to the printed circuit board, and determining there is excess flux residue on the printed circuit board.

Electronic device comprising an electronic component mounted on a support substrate and assembly method

A support substrate has first electric contacts in a front face. An electronic component is located above the front face of the support substrate and has second electric contacts facing the first electric contacts of the support substrate. An electric connection structure is interposed between corresponding first and second electric contacts of the support substrate and the electronic component, respectively. Each electric connection structure is formed by: a shim that is made of a first electrically conducting material, and a coating that is made of a second electrically conducting material (different from the first electrically conducting material). The coating surrounds the shim and is in contact with the corresponding first and second electric contacts of the support substrate and the electronic component.

Wafer-level methods of fabricating semiconductor device packages and related packages
10896894 · 2021-01-19 · ·

Methods of fabricating semiconductor device packages may involve forming trenches in a first wafer. A dielectric material may be placed over a first active surface. Electrically conductive elements may be operatively connected to bond pads of a second wafer with the dielectric material interposed between the first wafer and the second wafer. Force may be applied to the first wafer and the second wafer while exposing the first wafer and the second wafer to an elevated temperature. Portions of the dielectric material may flow into the trenches. The elevated temperature may be reduced to at least partially solidify the dielectric material. A thickness of the first wafer may be reduced to reveal the portions of the dielectric material in the trenches. The first wager may be singulated and the second wafer may be singulated to form semiconductor dice.

ELECTRONIC DEVICE COMPRISING AN ELECTRONIC COMPONENT MOUNTED ON A SUPPORT SUBSTRATE AND ASSEMBLY METHOD

A support substrate has first electric contacts in a front face. An electronic component is located above the front face of the support substrate and has second electric contacts facing the first electric contacts of the support substrate. An electric connection structure is interposed between corresponding first and second electric contacts of the support substrate and the electronic component, respectively. Each electric connection structure is formed by: a shim that is made of a first electrically conducting material, and a coating that is made of a second electrically conducting material (different from the first electrically conducting material). The coating surrounds the shim and is in contact with the corresponding first and second electric contacts of the support substrate and the electronic component.

FLUX RESIDUE DETECTION

A system for flux residue detection is provided. The system includes a flux heater, where the flux heater controls a temperature of a flux spray applied to a printed circuit board, and an infrared camera, wherein the infrared camera provides a thermal image of the flux on the printed circuit board. A method, a computer system, and a computer program product for flux residue detection is provided, including setting flux application parameters, applying flux to a printed circuit board, and capturing an infrared image of the flux applied to the printed circuit board. A method, a computer system, and a computer program product for flux residue detection is provided, including setting flux application parameters, applying flux to a printed circuit board, capturing an infrared image of the flux applied to the printed circuit board, and determining there is excess flux residue on the printed circuit board.

WAFER-LEVEL METHODS OF FABRICATING SEMICONDUCTOR DEVICE PACKAGES AND RELATED PACKAGES
20200105713 · 2020-04-02 ·

Methods of fabricating semiconductor device packages may involve forming trenches in a first wafer. A dielectric material may be placed over a first active surface. Electrically conductive elements may be operatively connected to bond pads of a second wafer with the dielectric material interposed between the first wafer and the second wafer. Force may be applied to the first wafer and the second wafer while exposing the first wafer and the second wafer to an elevated temperature. Portions of the dielectric material may flow into the trenches. The elevated temperature may be reduced to at least partially solidify the dielectric material. A thickness of the first wafer may be reduced to reveal the portions of the dielectric material in the trenches. The first wager may be singulated and the second wafer may be singulated to form semiconductor dice.

Interconnection including a cable assembly and a board assembly, a board assembly for an interconnection and a method for making an interconnection
10541479 · 2020-01-21 · ·

An interconnection includes a cable assembly and a board assembly. The cable assembly includes a cable having an inner conductor. The board assembly comprises an intermediate layer disposed between first and second outer layers, a recess disposed between the first and second outer layers so as to form a cable-receiving space at a first side edge, and a first inner-conductor contact opening extending through at least one of the first and second outer layers and opening into the cable-receiving space. The inner conductor is inserted at the first side edge into the cable-receiving space and is disposed at an offset in a longitudinal direction relative to the first inner-conductor contact opening. The inner conductor is electrically conductively soldered via a first soldered inner-conductor connection to a first inner-conductor connection region of the first and/or second outer layers, at least in a region of the first inner-conductor contact opening.

MATERIALS FOR SEMICONDUCTOR PACKAGE MOUNT APPLICATIONS AND METHODS OF USING THE SAME

An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag.sub.3Sn and/or Cu.sub.6Sn.sub.5.