Patent classifications
H05K2203/0505
Wired circuit board and production method thereof
An elongated wired circuit board including a plurality of wires arranged in parallel, wherein the plurality of wires each includes a first linear portion extending in a first linear direction, a second linear portion extending in a second linear direction, and a connection portion, the connection portion includes a first side, a second side, a third side, and a fourth side, length y1 and length S satisfy 0<y1<S, length y1 extending from the first corner portion reaching the first widthwise other end edge of the first linear portion, and length S extending from the first widthwise other end edge of the first linear portion of one wire, and the predetermined angle θ satisfies 0<θ<1 deg.
Lithographic exposure system and method for exposure and curing a solder resist
A lithographic exposure system and method for exposing and structuring a substrate coated with a solder resist is provided. The lithographic exposure system having at least one light beam, formed preferably by two or more laser beams of different UV wavelengths, which is deflected relative to the substrate by a variable deflection device, in order to generate structures on the substrate. In particular, the light beam is superimposed, spatially in the image plane and temporally in the exposure, by a spatially limited, high-energy, preferably externally mounted heat source, wherein preferably infrared laser diodes having linear optics are used.
WIRED CIRCUIT BOARD AND PRODUCTION METHOD THEREOF
An elongated wired circuit board including a plurality of wires arranged in parallel, wherein the plurality of wires each includes a first linear portion extending in a first linear direction, a second linear portion extending in a second linear direction, and a connection portion, the connection portion includes a first side, a second side, a third side, and a fourth side, length y1 and length S satisfy 0<y1<S, length y1 extending from the first corner portion reaching the first widthwise other end edge of the first linear portion, and length S extending from the first widthwise other end edge of the first linear portion of one wire, and the predetermined angle θ satisfies 0<θ<1 deg.
Wired circuit board and production method thereof
An elongated wired circuit board including a plurality of wires arranged in parallel, wherein the plurality of wires each includes a first linear portion extending in a first linear direction, a second linear portion extending in a second linear direction, and a connection portion, the connection portion includes a first side, a second side, a third side, and a fourth side, length y1 and length S satisfy 0<y1<S, length y1 extending from the first corner portion reaching the first widthwise other end edge of the first linear portion, and length S extending from the first widthwise other end edge of the first linear portion of one wire, and the predetermined angle θ satisfies 0<θ<1 deg.
Direct Exposure Device for the Direct Exposure of Solder Resists in a 2-Dimensional, Quickly Temperature-Controlled Environment
The invention generally relates to an exposure device, in particular an exposure device for exposing and structuring a substrate coated with a solder resist, as well as the corresponding method for exposure with the exposure device according to the invention. In particular, the invention relates to an exposure device having at least one light beam, formed preferably by two or more laser beams of different UV wavelengths, which is deflected relative to the substrate by a variable deflection device, in order to generate structures on the substrate. In particular, the light beam is superimposed, spatially in the image plane and temporally in the exposure, by a spatially limited, high-energy, preferably externally mounted heat source, wherein preferably infrared laser diodes having linear optics are used.
WIRED CIRCUIT BOARD AND PRODUCTION METHOD THEREOF
An elongated wired circuit board including a plurality of wires arranged in parallel, wherein the plurality of wires each includes a first linear portion extending in a first linear direction, a second linear portion extending in a second linear direction, and a connection portion, the connection portion includes a first side, a second side, a third side, and a fourth side, length y1 and length S satisfy 0<y1<S, length y1 extending from the first corner portion reaching the first widthwise other end edge of the first linear portion, and length S extending from the first widthwise other end edge of the first linear portion of one wire, and the predetermined angle satisfies 0<<1 deg.
Zero-misalignment via-pad structures
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
ZERO-MISALIGNMENT VIA-PAD STRUCTURES
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
Zero-misalignment via-pad structures
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
ZERO-MISALIGNMENT VIA-PAD STRUCTURES
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.