A method for producing a wiring circuit board includes first forming a base insulating layer, and second forming a first wiring and a second wiring having different thicknesses from each other in order. The second step includes, in order, forming a seed film, forming a first resist in a reversed pattern of the first wiring on one surface in a thickness direction of the seed film, forming the first wiring on one surface in the thickness direction of the seed film by plating, removing the first resist, of forming a second resist in a reversed pattern of the second wiring on one surface in the thickness direction of the seed film to cover the first wiring, forming the second wiring on one surface in the thickness direction of the seed film by plating, removing the second resist, and removing the seed film.

In a method of manufacturing a printed wiring board with a pattern formed using a printing process, a pattern of a portion requiring position accuracy can be accurately formed at a predetermined position.

A method of manufacturing a printed wiring board 10 according to the present invention includes preparing a laminated board 12 including a metal layer 16 formed on a surface of a base material 14, forming a first etching resist layer 20a by printing a pattern of a portion 18a requiring position accuracy on the metal layer of the laminated board using a metal mask 32, forming a second etching resist layer 20b by printing a pattern of a portion 18b other than the portion requiring position accuracy on the metal layer of the laminated board using a screen plate 34, removing, by etching, the metal layer of the laminated board where the first etching resist layer and the second etching resist layer are not formed, and stripping the first etching resist layer and the second etching resist layer.

A method for forming a resist fine pattern uses inkjet printing for printing an ink along a path to form a resist fine pattern on a substrate having the same surface energy. The method includes an ejecting step of simultaneously discharging a photocurable resist ink and a partition-forming ink that are spaced from each other on the front side and the rear side of the path and applying the light energy to the discharged photocurable resist ink. The intensity of light is set so that, as the photocurable resist ink is semi-cured and is ejected on the substrate in a gelatinous state, the ink forms a boundary that is vertical with respect to the partition-forming ink ejected on the substrate and the spreading of the photocurable resist ink is prevented, and the photocurable resist ink is cured after both the photocurable resist ink and the partition-forming ink are completely ejected.

A transparent conductive film is disclosed. The transparent conductive film includes a substrate; a first silver nanowire layer disposed on the substrate; and a protective layer disposed on the first silver nanowire layer, wherein the protective layer is a patternable photoresist and has an identical pattern as the first silver nanowire layer.

A microelectronic structure may be formed comprising a microelectronic package having a plurality of interconnects and a microelectronic substrate including an upper metallization layer and a solder resist structure, wherein the solder resist structure includes a first structure which forms an electrical connection between a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, and wherein solder resist structure includes a second structure which prevents second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer.

A microelectronic structure may be formed comprising a microelectronic package having a plurality of interconnects and a microelectronic substrate including an upper metallization layer and a solder resist structure, wherein the solder resist structure includes a first structure which forms an electrical connection between a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, and wherein solder resist structure includes a second structure which prevents second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer.

A microelectronic structure may be formed comprising a microelectronic package having a plurality of interconnects and a microelectronic substrate including an upper metallization layer and a solder resist structure, wherein the solder resist structure includes a first structure which forms an electrical connection between a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, and wherein solder resist structure includes a second structure which prevents second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer.

A microelectronic structure may be formed comprising a microelectronic package having a plurality of interconnects and a microelectronic substrate including an upper metallization layer and a solder resist structure, wherein the solder resist structure includes a first structure which forms an electrical connection between a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, and wherein solder resist structure includes a second structure which prevents second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer.

A circuit board including a substrate, a patterned circuit layer and a photo-imaginable dielectric layer is provided. The substrate has a first surface and a second surface opposite to each other. The patterned circuit layer is disposed on the first surface, and a line width of the patterned circuit layer gradually reduces from the first surface towards the second surface. The photo-imaginable dielectric layer is disposed in the substrate corresponding to the patterned circuit layer. In addition, a manufacturing method of the circuit board is also proposed.

The present disclosure relates to a method of manufacturing a layer structure for a component carrier. According to the method, a carrier layer is provided. An imprint resist layer is added onto the carrier layer and predefined structures forming at least one recess are stamped into the imprint resist layer by a predefined stamp. The recess defines a filling structure in or on the carrier layer. In the filling structure at least one of an electrically insulating material and an electrically conductive material is filled.