A method is disclosed for mounting and cooling a circuit component having aplurality of contacts. The method comprises mounting the circuit component on a rigid substrate of a thermally conductive and electrically insulating material with a circuit board arranged between the circuit component and the substrate. The circuit board, which has a flexible base and carries conductive traces that terminate in contact pads, is secured to the rigid substrate with at least some of the contact pads on the circuit board disposed on the side of the circuit board facing the rigid substrate, at least some of the latter contact pads being bonded to the substrate. To establish both an electrical and a thermal connection between the contacts of the circuit component and the contact pads bonded to the substrate, blind holes are formed in the flexible base of the circuit board, each hole terminating at a respective one of the contact pads bonded to the substrate. The side of the contact pads exposed by the holes is plated to form conductive vias that fill the holes and that are soldered to the contacts of the circuit component.

A printed circuit board has a core made of an aluminum material; a bonding member positioned on opposite surfaces of the core; a base layer bonded to the opposite surface of the core through the bonding member; a receiving hole extending through the core, the bonding member, and the base layer; a zinc substitution layer positioned on a surface of the base layer and a portion of the base layer exposed on an inner surface of the receiving hole; and a plating layer positioned on the zinc substitution layer, and having a circuit pattern.

The present invention relates to a method for reducing the optical reflectivity of a copper and copper alloy circuitry wherein a thin palladium or palladium alloy layer is deposited by immersion-type plating onto said copper or copper alloy. Thereby, a dull greyish or greyish black or black layer is obtained and the optical reflectivity of said copper or copper alloy circuitry is reduced. The method according to the present invention is particularly suitable in the manufacture of image display devices, touch screen devices and related electronic components.

Compositions and methods for silver plating onto metal surfaces such as PWBs in electronics manufacture to produce a silver plating which is greater than 80 atomic % silver, tarnish resistant, and has good solderability.

A printed circuit board has a double-sided substrate with an insulation layer, a bonding member, a base layer of an aluminum material, and a circuit pattern; a second insulation layer; a second bonding member; a second base layer; a through hole; a zinc substitution layer; a plating layer; and a second circuit pattern.

A method is disclosed for mounting and cooling a circuit component having a plurality of contacts. The method comprises mounting the circuit component on a rigid substrate of a thermally conductive material having and electrically insulating regions with a circuit board arranged between the circuit component and the substrate. The circuit board, which carries conductive traces that terminate in contact pads, is secured to the substrate with at least some of the contact pads on the circuit board disposed on the side of the board facing the substrate, some of which being bonded to the substrate. To establish both an electrical and a thermal connection between the contacts of the circuit component and the contact pads bonded to the substrate, blind holes are formed in the base of the circuit board, each hole terminating at a respective one of the contact pads bonded to the substrate.

A circuit sub-assembly is disclosed adapted for mounting and cooling a circuit component having a plurality of contacts. Circuit component can be mounted on a rigid substrate of a thermally conductive material having electrically insulating regions with a circuit board arranged between the circuit component and the substrate. The circuit board, which carries conductive traces that terminate in contact pads, is secured to the substrate with at least some of the contact pads on the circuit board disposed on the side of the board facing the substrate, some of the latter contact pads being bonded to the substrate. To establish both an electrical and a thermal connection between the contacts of the circuit component and the contact pads bonded to the substrate, there are blind holes formed in the base of the circuit board, each hole terminating at a respective one of the contact pads bonded to the substrate.

A wiring board includes an insulation resin layer, and a wiring conductor positioned on the insulation resin layer. The wiring conductor includes a first and second underlying metal layers, a wiring metal layer positioned on the second underlying metal layer, a tin layer positioned covering the first underlying metal layer, the second underlying metal layer, and the wiring metal layer, and a silane coupling agent layer positioned covering the tin layer. When the wiring conductor is seen in a cross section in a width direction, the wiring metal layer includes, from the first underlying metal layer side, a portion with a width narrower than a width of the first underlying metal layer, a portion with a width equal to the width of the first underlying metal layer, and a portion with a width wider than the width of the first underlying metal layer.

An object is to provide an electroless plating process which can thin a film thickness of a nickel film and can obtain a film having excellent mounting characteristics, when the nickel film and a gold film are sequentially formed on a surface of a copper material. In order to solve the above-mentioned problems, provided is an electroless plating process which sequentially forms a nickel film and a gold film on a surface of a copper material by an electroless plating method and includes: a step of forming the nickel film on the surface of the copper material by an electroless strike plating method; and a step of forming the gold film by a reduction-type electroless plating method.

A circuit board includes a first wiring layer and a build-up structure. The build-up structure includes at least one dielectric layer and at least one second wiring layer. Each dielectric layer and each second wiring layer are alternately arranged. The at least one dielectric layer comprises an outermost dielectric layer. The at least one second wiring layer is formed on a side of the outermost dielectric layer, and comprises an outermost second wiring layer. A portion of the first wiring layer is embedded in a side of the outermost dielectric layer facing away the outermost second wiring layer, a remaining portion of the first wiring layer protrudes from the outermost dielectric layer. A method for manufacturing a circuit board is provided.