H05K2203/143

COMPLIANT PIN SURFACE MOUNT TECHNOLOGY PAD FOR REWORK
20220400557 · 2022-12-15 ·

Aspects of the invention include a press-fit pin for mechanically and electrically connecting to a through-hole of a substrate. The press-fit pin can include a press-fit portion configured to be deformed upon insertion into the through-hole against a plated surface of the through-hole. A surface mount technology (SMT) pad can be coupled to a first end of the press-fit portion. The SMT pad can include a conductive material. The press-fit pin can further include a trace extension coupled to the SMT pad. The trace extension can extend from the SMT pad in a direction perpendicular to the press-fit portion. The press-fit pin can include a tip portion coupled to a second end of the press-fit portion.

METHOD FOR MANUFACTURING PRINTED WIRING BOARD
20230030601 · 2023-02-02 · ·

A method for manufacturing a printed wiring board includes forming through holes in a double-sided copper-clad laminated plate such that a high-density region of the through holes and a low-density region of the through holes are formed, forming an electrolytic plating film on a copper foil of the plate in the high-density and low-density regions, forming a masking resist to mask the plating film in the high-density region, etching the plating film in the low-density region exposed from the resist such that the plating film in the low-density region is thinned, peeling off the resist from the plating film in the high-density region, and forming a conductor circuit including the copper foil and the plating film in the high-density and low-density regions. The forming of the plating film on the copper foil of the plate includes forming the plating film in the through holes in the high-density and low-density regions.

CONNECTION METHOD FOR CHIP AND CIRCUIT BOARD, AND CIRCUIT BOARD ASSEMBLY AND ELECTRONIC DEVICE
20230081618 · 2023-03-16 ·

A connection method for a chip and a circuit board includes: placing the circuit board on the chip, the circuit board having a first surface in contact with the chip having a plurality of contacts, and the circuit board having a plurality of through holes aligned with the plurality of contacts respectively; placing a mask on a second surface of the circuit board, the mask having a plurality of openings aligned with the plurality of through holes respectively; covering a surface of the mask with a conductive adhesive to fill the plurality of through holes with the conductive adhesive; and keeping portions of the conductive adhesive that are respectively in the plurality of through holes to be spaced apart from each other. The portions of the conductive adhesive that fill the plurality of through holes remain to provide an electrical connection between the circuit board and the chip.

PCB structure for embedding electronic components

A PCB, printed circuit board, structure for forming at least one embedded electronic component. The structure comprises a multi-layer PCB board comprising at least one through-hole via, the via comprising a plurality of electrodes vertically aligned within the via, each electrode comprising a plated ring; and an isolation section separating each of the electrodes.

METHOD FOR MANUFACTURING WIRING SUBSTRATE

A method for manufacturing a wiring substrate includes forming a resin insulating layer on a first conductor layer such that the resin insulating layer covers the first conductor layer, applying a roughening treatment on a surface of the resin insulating layer on the opposite side with respect to the first conductor layer, forming an opening in the resin insulating layer after the roughening treatment on the surface of the resin insulating layer such that the opening penetrates through the resin insulating layer and exposes a portion of the first conductor layer, and forming a second conductor layer on the surface of the resin insulating layer such that the second conductor layer is formed in contact with the surface of the resin insulating layer and that a via conductor is formed in the opening of the resin insulating layer.

PRINTED CIRCUIT BOARD, FABRICATION METHOD OF THE SAME AND ELECTRONIC DEVICE INCLUDING THE SAME
20230121285 · 2023-04-20 ·

A printed circuit board and/or an electronic device including the same are provided. The printed circuit board and/or an electronic device includes at least one insulation layer including a first rigid region and a flexible region extending from the first rigid region, at least one first circuit pattern disposed on one surface of the at least one insulation layer to at least partially transverse the flexible region from the first rigid region, and at least one conductive pad formed at least partially on a surface of the first circuit pattern in the first rigid region, wherein the flexible region may be configured to flexibly deform more than the first rigid region.

Compliant pin surface mount technology pad for rework

Aspects of the invention include a press-fit pin for mechanically and electrically connecting to a through-hole of a substrate. The press-fit pin can include a press-fit portion configured to be deformed upon insertion into the through-hole against a plated surface of the through-hole. A surface mount technology (SMT) pad can be coupled to a first end of the press-fit portion. The SMT pad can include a conductive material. The press-fit pin can further include a trace extension coupled to the SMT pad. The trace extension can extend from the SMT pad in a direction perpendicular to the press-fit portion. The press-fit pin can include a tip portion coupled to a second end of the press-fit portion.

Hermetic metallized via with improved reliability

According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

CONDUCTIVE SUBSTRATE AND CARRIER PLATE WIRING STRUCTURE WITH FILTERING FUNCTION, AND MANUFACTURING METHOD OF SAME
20230309240 · 2023-09-28 ·

A manufacturing method for a conductive substrate with a filtering function includes preparing a core layer and forming first and second conductive holes in the core layer, forming a sacrificial copper layer on the first conductive hole and on the core layer, forming a metal layer on the second conductive hole, forming a metal post in the first conductive hole, forming a lower insulating layer on the core layer, forming a lower insulative post in the second conductive hole, forming a magnet wrapping around the metal post to obtain a first conductive post, forming an upper insulating layer on the core layer, forming an upper insulative post in the second conductive hole to obtain a second conductive post, removing the upper insulating layer, the lower insulating layer, and the remaining sacrificial copper post layer, followed by flattening.

SHIELDED SIGNAL VIAS IN PRINTED CIRCUIT BOARDS FOR HIGH-FREQUENCY AND BROADBAND SIGNALS
20230292431 · 2023-09-14 · ·

A printed circuit board (PCB) core structure is provided for the transition of signals from one side of a PCB to an opposing side of the PCB. The PCB core structure may include a laminated core including an inner core including a plurality of conductive layers (N layers), a first dielectric layer, a first conductive trace disposed over the Nth conductive layer on a first side of the laminated core. The PCB core structure may also include a signal via extending from a first conductive layer to an Nth conductive layer through the laminated core, the signal via configured to connect the first conductive trace to a pin or a second conductive trace on a second side of the laminated core. The PCB core structure may also include a shielding structure surrounding the signal via and partially extending from the first conductive layer to the Nth conductive layer. The PCB core structure may also include a cavity removing a portion of the shielding structure in the Nth conductive layer and filled with a dielectric material. The cavity filled with the dielectric material prevents the first conductive trace from shorting to the shielding structure. The PCB core structure may be fabricated by using a single-lamination cycle.