A circuit board includes a substrate, a first magnetic structure, a first dielectric layer and an inductive coil. The substrate has a top surface and a bottom surface. The first magnetic structure is disposed on the top surface of the substrate. The first dielectric layer covers the substrate and the first magnetic structure. The inductive coil includes a first interconnect, a second interconnect and a plurality of conductive pillars. The first interconnect is disposed on the first dielectric layer. The second interconnect is disposed on the bottom surface of the substrate. The conductive pillars connect the first interconnect and the second interconnect. The first interconnect, the second interconnect and the conductive pillars form a helical structure surrounding the first magnetic structure.

A printed wiring board according to an aspect of the present invention includes an insulating resin, a plated copper formed on a front surface side of the insulating resin, and a plated copper formed on a back surface side of the insulating resin. The plated copper and the plated copper are electrically connected via a plated copper that fills a through hole penetrating the insulating resin from the front surface side to the back surface side. Furthermore, the through hole includes a conical section whose opening diameter decreases from the front surface side to the back surface side of the insulating resin, and a cylindrical section that communicates with the conical section at a bottom surface of the conical section.

The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A packaging substrate includes a core layer including a glass substrate with a first surface and a second surface facing each other, and a plurality of core vias. The plurality of core vias penetrating through the glass substrate in a thickness direction, each comprising a circular core via having a circular opening part and a non-circular core via having an aspect ratio of 2 to 25 in the x-y direction of an opening part. One or more electric power transmitting elements are disposed on the non-circular core via.

A through wiring substrate comprises a substrate having a pair of principal surfaces and a through hole penetrating between the pair of principal surfaces, the pair of principal surfaces and an inner surface of the through hole being electrically insulative; a through electrode provided on the inner surface of the through hole; a first wiring layer provided on one of the principal surfaces and connected to the through electrode; a second wiring layer provided on the other of the principal surfaces and connected to the through electrode; an underlying metal layer provided between the one of the principal surfaces and the first wiring layer; and catalyst metal particles existing between the underlying metal layer and the first wiring layer and between the through electrode and the inner surface of the through hole.

The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

A process for efficiently producing a wiring board in which an insulating substrate 1 having a through hole 2 is used, which includes forming a seed layer 3 on one surface of the insulating substrate 1, covering the surface of the insulating substrate 1 on which the seed layer 3 is formed with a masking film 4, arranging the insulating substrate 1 and a positive electrode 5 so that the surface of the insulating substrate 1 opposite to the surface of the insulating substrate 1 on which the seed layer 3 of the insulating substrate 1 is formed is faced to the positive electrode 5, carrying out electroplating to form a metal layer 8 in the through hole 2, and then removing the masking film 4.

A printed circuit board deformable in both length and width includes a first conductive circuit layer, a second conductive circuit layer, an elastic film, and conductive via holes. The first conductive circuit layer includes first conductive circuits. First honeycomb holes are defined on the first conductive circuits. The second conductive circuit layer faces away from the first conductive circuit layer, the second conductive circuit layer comprises second conductive circuits, second honeycomb holes being defined on the second conductive circuits, each of the second honeycomb holes corresponds to one of the first honeycomb holes. The first conductive circuits are embedded in the elastic film. Each of the conductive via holes corresponds to one first honeycomb holes.

Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 μm for fine line width/pitch.