A semiconductor device including a semiconductor substrate having an upper surface and a lower surface is provided. In a depth direction connecting the upper and lower surfaces of the semiconductor substrate, a donor concentration distribution includes a first donor concentration peak at a first depth, a second donor concentration peak at a second depth between the first donor concentration peak and the upper surface, a flat region between the first donor concentration peak and the second donor concentration peak, and a plurality of donor concentration peaks between the first donor concentration peak and the lower surface. The second donor concentration peak has a lower concentration than the first donor concentration peak. The donor concentration distribution in the flat region is substantially flat. The thickness of the flat region in the depth direction is 10% or more of the thickness of the semiconductor substrate.

A power semiconductor device comprises a semiconductor body, a gate electrode, and an extraction electrode, wherein the semiconductor body comprises a source region of a first conductivity type, well region of a second conductivity type different from the first conductivity type at the gate electrode, a drift region which is of the first conductivity type, and a barrier region which is of the first conductivity type, the barrier region is located between the drift region and the extraction electrode.

A power semiconductor device having a barrier region is provided. A power unit cell of the power semiconductor device has at least two trenches that may both extend into the barrier region. The at least two trenches may both have a respective trench electrode coupled to a control terminal of the power semiconductor device. For example, the trench electrodes are structured to reduce the total gate charge of the power semiconductor device. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by the drift region. The barrier region can be electrically floating.

There is provided a semiconductor device including: a drift region of a first conductivity type disposed in a semiconductor substrate; a base region of a second conductivity type disposed above the drift region; an emitter region of the first conductivity type disposed above the base region; a plurality of trench portions arrayed in a predetermined array direction on a front surface side of the semiconductor substrate; a trench contact disposed on the front surface side of the semiconductor substrate between two adjacent trench portions; and a contact layer of the second conductivity type disposed under the trench contact and having a higher doping concentration than the base region, wherein a lower end of the trench contact is deeper than a lower end of the emitter region, and the emitter region and the contact layer are in contact with each other at a side wall of the trench contact.

A semiconductor apparatus includes a semiconductor substrate and a second electrode. Semiconductor substrate includes a device region and a peripheral region. An n.sup. drift region and second electrode extend from device region to peripheral region. An n buffer layer and a p collector layer are provided also in peripheral region. Peripheral region is provided with an n type region. N type region is in contact with second electrode and n buffer layer. The turn-off loss of the semiconductor apparatus is reduced.

Provided is a semiconductor device including: a semiconductor substrate including an active portion in which transistor portions and diode portions are alternately provided and provided with a plurality of trench portions extending in an extending direction of the transistor portion and the diode portion; an emitter electrode provided above a front surface of the semiconductor substrate; and a protective film of polyimide provided on an upper surface of the emitter electrode, wherein the diode portion includes a lifetime control region including a lifetime killer irradiated from a front surface side of the semiconductor substrate, wherein the active portion includes a protected region provided with the protective film and an unprotected region not provided with the protective film, and wherein the diode portion is included in the unprotected region and the protected region is included in the transistor portion.

We herein describe a semiconductor device comprising a first element portion formed on a substrate, the first element portion being an operating region of an insulated gate bipolar transistor (IGBT) and a second element portion formed on the substrate, the second element portion being an operating region of a diode. The first element portion comprises a first collector region of a second conductivity type, a drift region of a first conductivity type located over the first collector region, and formed by the semiconductor substrate, a first body region of a first conductivity type located over the drift region, a second body region of a second conductivity type located over the drift region, at least one first contact region of a first conductivity type located above the second body region and having a higher doping concentration compared to the first body region, at least one second contact region of a second conductivity type located laterally adjacent to the at least one first contact region, the at least one second contact region having a higher doping concentration than the second body region, a first plurality of trenches extending from a surface through the second body region of a second conductivity type into the drift region wherein the at least one first contact region adjoins at least one of the plurality of trenches so that, in use, a channel region is formed along said at least one trench of the first plurality of trenches and within the body region of a second conductivity type. A first trench of the first plurality of trenches is laterally spaced from a second trench of the first plurality of trenches by a first distance. The second element portion comprises a second collector region of a second conductivity type, the drift region of a first conductivity type located over the second collector region, a third body region of a second conductivity type located over the drift region, a second plurality of trenches extending from a surface through the third body region into the drift region. A first trench of the second plurality of trenches is laterally spaced from a second trench of the second plurality of trenches by a second distance, and the first distance is larger than the second distance. The semiconductor device further comprises a first terminal contact, wherein the first terminal contact is electrically connected to the at least one first contact region of a first conductivity type and the body region of a second conductivity type and a second terminal contact, wherein the second terminal contact is electrically connected to the first collector region and the second collector region.

A semiconductor device includes substrate, a first gate structure, a second gate structure, and an epitaxy layer. The first gate structure and the second gate structure are over the substrate, in which the first gate structure and the second gate structure each comprises a shielding electrode, a gate electrode over the shielding electrode, and a first gate dielectric layer vertically separating the shielding electrode from the gate electrode. The epitaxy layer is over the substrate and cups an underside of the first gate structure and the second gate structure, in which the epitaxy layer comprises a doped region laterally between the first gate dielectric layer of the first gate structure and the first gate dielectric layer of the second gate structure, a dopant concentration of the doped region being non-uniform along a lateral direction.

A semiconductor device includes a chip having a main surface, an IGBT region formed at the main surface, a diode region formed at the main surface, an insulating film formed on the main surface so as to expose the diode region and so as to cover the IGBT region, a plug electrode embedded in a part, which covers the IGBT region, of the insulating film so as to be partially exposed from the insulating film, and a main surface electrode that includes a first electrode film covering the plug electrode so as to expose the diode region and a second electrode film covering the first electrode film and the diode region.

A semiconductor device includes a chip with a main surface, featuring a first conductivity type base region. A trench gate structure penetrates the base region, while a second conductivity type emitter region is formed along the trench gate structure on the surface. Between the bottom of the base region and the emitter region, a higher impurity concentration in-base region is present. An insulating film covers the main surface, featuring a connection hole that exposes part of the emitter region at a distance from the in-base region. A connection electrode is positioned in the connection hole, electrically connecting the base and emitter regions.