Disclosed is a transistor device. The transistor device includes a plurality of device cells each having an active device region integrated in a semiconductor body and electrically connected to a contact layer. The contact layer includes a plurality of layer sections separated from each other by a separation layer. A resistivity of the separation layer is at least 100 times the resistivity of the layer sections.

The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.

Provided is a semiconductor device including a semiconductor substrate, a plurality of gate electrodes disposed on the upper surface portion of the semiconductor substrate and spaced apart from each other, a plurality of emitter electrodes disposed to be overlapped with each of the plurality of gate electrodes, and a collector electrode disposed on the lower surface of the semiconductor substrate.

A semiconductor device including: a semiconductor substrate; a temperature sensing unit provided on a front surface of the semiconductor substrate; an anode pad and a cathode pad electrically connected with the temperature sensing unit; a front surface electrode being set to a predetermined reference potential; and a bidirectional diode unit electrically connected in a serial bidirectional way between the cathode pad and the front surface electrode is provided. The bidirectional diode unit may be arranged between the anode pad and the cathode pad on the front surface.

There is provided a semiconductor device including: a pad portion that is provided above the upper surface of the semiconductor substrate and that is separated from the emitter electrode; a wire wiring portion that is connected to a connection region on an upper surface of the pad portion; a wiring layer that is provided between the semiconductor substrate and the pad portion and that includes a region overlapping the connection region; an interlayer dielectric film that is provided between the wiring layer and the pad portion and that has a through hole below the connection region; a tungsten portion that contains tungsten and that is provided inside the through hole and electrically connects the wiring layer and the pad portion; and a barrier metal layer that contains titanium and that is provided to cover an upper surface of the interlayer dielectric film below the connection region.

A power semiconductor device is proposed. The vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having a first surface and a second surface opposite to the first surface. The SiC semiconductor body includes a transistor cell area comprising gate structures, a gate pad area, and an interconnection area electrically coupling a gate electrode of the gate structures and a gate pad of the gate pad area via a gate interconnection. The vertical power semiconductor device further includes a source or emitter electrode. The vertical power semiconductor device further includes a first interlayer dielectric comprising a first interface to the source or emitter electrode and a second interface to at least one of the gate electrode, or the gate interconnection, or the gate pad, and wherein a conduction band offset at the first interface ranges from 1 eV to 2.5 eV.

A semiconductor device, including a semiconductor substrate, a plurality of trenches formed on a front surface of the semiconductor substrate, a plurality of gate electrodes formed in the trenches, a base region and an anode region formed between adjacent trenches respectively in first and second element regions of the semiconductor substrate, a plurality of emitter regions and contact regions selectively formed in the base region, an interlayer insulating film covering the gate electrodes, first and second contact holes penetrating the interlayer insulating film, a plurality of contact plugs embedded in the first contact holes, a first electrode contacting the contact plugs and contacting the anode region via the second contact hole, a collector region and a cathode region formed on a back surface of the semiconductor substrate respectively in the first and second element regions, and a second electrode contacting the collector region and the cathode region.

An insulated gate bipolar transistor has: a first active area, a second active area, and a non-active area between the first active area and the second active area. Dummy trenches are disposed in the non-active area. An inter-trench region is disposed in a hole accumulation region between a first boundary gate trench and a second boundary gate trench, so as to satisfy following conditions: plural non-contact inter-trench regions are arranged in the non-active area; at least one contact inter-trench region is arranged in the non-active area; and the non-contact inter-trench regions are not adjacent to each other in the hole accumulation region.

A semiconductor device includes a semiconductor chip and a thermistor mounted on the semiconductor chip. The thermistor is mounted on an insulating substrate bonded to the semiconductor chip, and the semiconductor chip and the thermistor are insulated from each other by the insulating substrate. Formed on the insulating substrate is a pattern wiring leading an electrode of the thermistor outside of the thermistor in a plan view.

Provided is a semiconductor device, including a transistor portion and a diode portion arranged side by side, wherein the transistor portion has a first contact portion where a first mesa portion among a plurality of mesa portions contacts a metal electrode, a second contact portion where a second mesa portion arranged away from the diode portion further than the first mesa portion among the plurality of mesa portions contacts a metal electrode; wherein a lower end of the second contact portion is arranged above a lower end of the first contact portion.