A merged PiN Schottky (MPS) diode includes a substrate, a first epitaxial layer of a first conductivity type, doped regions of a second conductivity type, a second epitaxial layer of the first conductivity type, and a Schottky metal layer. The first epitaxial layer is disposed on the first surface of the substrate. The doped regions are disposed in a surface of the first epitaxial layer, wherein the doped regions consist of first portions and second portions, the first portions are electrically floating, and the second portions are electrically connected to a top metal. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein trenches are formed in the second epitaxial layer to expose the second portions of the doped regions. The Schottky metal layer is conformally deposited on the second epitaxial layer and the exposed second portions of the doped regions.

A 3D semiconductor device including: a first level including a first single crystal layer and first transistors, which each include a single crystal channel; a first metal layer with an overlaying second metal layer; a second level including second transistors, overlaying the first level; a third level including third transistors, overlaying the second level; a fourth level including fourth transistors, overlaying the third level, where the second level includes first memory cells, where each of the first memory cells includes at least one of the second transistors, where the fourth level includes second memory cells, where each of the second memory cells includes at least one of the fourth transistors, where the first level includes memory control circuits, where second memory cells include at least four memory arrays, each of the four memory arrays are independently controlled, and at least one of the second transistors includes a metal gate.

A number of Monolithic Microwave Integrated Circuit (MMIC) devices including combinations of PIN and Schottky diodes, with integrated passive electrical components fabricated and electrically connected among them, are described herein, along with new process techniques for forming the MMIC devices. In one example, a monolithic semiconductor includes a substrate, a plurality of layers of semiconductor materials over the substrate, Schottky and Ohmic contacts on a first subset of the plurality of layers for a Schottky diode, and PIN diode Ohmic contacts on a second subset of the plurality of layers for a PIN diode. The device can also include an etch stop layer between the first subset of the plurality of layers and the second subset of the plurality of layers. The etch stop layer facilitates selective etching and isolation of the Schottky diode from the PIN diode by consecutive etchings.

A number of Monolithic Microwave Integrated Circuit (MMIC) devices including combinations of PIN and Schottky diodes, with integrated passive electrical components fabricated and electrically connected among them, are described herein, along with new process techniques for forming the MMIC devices. In one example, a monolithic semiconductor includes a substrate, a plurality of layers of semiconductor materials over the substrate, Schottky and Ohmic contacts on a first subset of the plurality of layers for a Schottky diode, and PIN diode Ohmic contacts on a second subset of the plurality of layers for a PIN diode. The device can also include an etch stop layer between the first subset of the plurality of layers and the second subset of the plurality of layers. The etch stop layer facilitates selective etching and isolation of the Schottky diode from the PIN diode by consecutive etchings.

A semiconductor device comprising a source region being electrically connected to a first load terminal (E) of the semiconductor device and a drift region comprising a first semiconductor material (M1) having a first band gap, the drift region having dopants of a first conductivity type and being configured to carry at least a part of a load current between the first load terminal (E) and a second load terminal (C) of the semiconductor device, is presented. The semiconductor device further comprises a semiconductor body region having dopants of a second conductivity type complementary to the first conductivity type and being electrically connected to the first load terminal (E), a transition between the semiconductor body region and the drift region forming a pn-junction, wherein the pn-junction is configured to block a voltage applied between the first load terminal (E) and the second load terminal (C). The semiconductor body region isolates the source region from the drift region and includes a reduced band gap zone comprising a second semiconductor material (M2) having a second band gap that is smaller than the first band gap, wherein the reduced band gap zone is arranged in the semiconductor body region such that the reduced band gap zone and the source region exhibit, in a cross-section along a vertical direction (Z), at least one of a common lateral extension range (LR) along a first lateral direction (X) and a common vertical extension range (VR) along the vertical direction (Z).

A method of manufacturing a super junction MOSFET, which includes a parallel pn layer including a plurality of pn junctions and in which an n-type drift region and a p-type partition region interposed between the pn junctions are alternately arranged and contact each other, a MOS gate structure on the surface of the parallel pn layer, and an n-type buffer layer in contact with an opposite main surface. The impurity concentration of the buffer layer is equal to or less than that of the n-type drift region. At least one of the p-type partition regions in the parallel pn layer is replaced with an n region with a lower impurity concentration than the n-type drift region.

Apparatus and methods for PIN diode switches for radio frequency electronic systems are provided herein. In certain configurations, a packaged switch including a packaging substrate including a die paddle and a thermally conductive substrate attached to the die paddle, one or more PIN diode switches attached to the thermally conductive substrate, and a driver chip attached to the die paddle and configured to generate a plurality of bias voltages operable to control biasing of the one or more PIN diode switches. The driver chip includes a switching regulator configured to generate a first bias voltage of the plurality of bias voltages and a charge pump configured to generate a second bias voltage of the plurality of bias voltages.

This invention discloses a semiconductor device disposed in a semiconductor substrate. The semiconductor device includes a first semiconductor layer of a first conductivity type on a first major surface. The semiconductor device further includes a second semiconductor layer of a second conductivity type on a second major surface opposite the first major surface. The semiconductor device further includes an injection efficiency controlling buffer layer of a first conductivity type disposed immediately below the second semiconductor layer to control the injection efficiency of the second semiconductor layer.

There is provided an MPS diode comprising a first semiconductor layer that is an N type; P-type semiconductor regions and N-type semiconductor regions that are arranged alternately on one surface of the first semiconductor layer; and a Schottky electrode that is in Schottky junction with the N-type semiconductor regions and is arranged to be adjacent to and in contact with at least part of the P-type semiconductor regions. A donor concentration in an area of the N-type semiconductor region that is adjacent to and in contact with the first semiconductor layer is lower than the donor concentration in an area of the first semiconductor layer that is adjacent to and in contact with the N-type semiconductor region and is lower than the donor concentration in an area of the N-type semiconductor region that is adjacent to and in contact with the Schottky electrode. This configuration improves a breakdown voltage under applying a reverse bias voltage and reduces a rising voltage under applying a forward bias voltage.

A wireless communication device that has a circuit board, an RF signal module, a capacitive touch-sensing component, or a functional component, and an antenna component is provided. The touch-sensing signal module is disposed on the circuit board. The capacitive touch-sensing component includes a sensing layer and a ground layer. The sensing layer is electrically connected to the touch-sensing signal module. The antenna component includes a feed point and a radiating body. The feed point is disposed on the ground layer and is electrically connected to the RF single module. The radiating body incorporates at least parts of the ground layer. Alternatively, the feed point is disposed on the sensing layer, and the radiating body incorporates at least parts of the sensing layer. Therefore, the radiating body is incorporated into the sensing layer or ground layer of the capacitive touch-sensing component and can save accommodating space.