Patent classifications
H10D84/0163
Group-III nitride semiconductor device and method for fabricating the same
The present invention discloses a group-III nitride semiconductor device, which comprises a substrate, a buffer layer, a semiconductor stack structure, and a passivation film. The buffer layer is disposed on the substrate. The semiconductor stack structure is disposed on the buffer layer and comprises a gate, a source, and a drain. In addition, a gate insulating layer is disposed between the gate and the semiconductor stack structure for forming a HEMT. The passivation film covers the HEMT and includes a plurality of openings corresponding to the gate, the source, and the drain, respectively. The material of the passivation film is silicon oxynitride.
Power semiconductor device with over-current protection
A power semiconductor device has an upper transistor and a lower transistor that is coupled in cascode with the upper transistor. The upper transistor comprises an upper drain, upper gate, and an upper source. The lower transistor comprises a lower drain that is coupled to the upper source, a lower gate, and a lower source that is coupled to the upper gate. The upper transistor is a depletion mode device and has a first saturation current. The lower transistor is an enhancement mode device and has a second saturation current, which is lower than the first saturation current.
Semiconductor device and manufacturing method thereof
An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel fog nation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
SEMICONDUCTOR DEVICE AND ASSOCIATED METHODS
A semiconductor device comprising: a die-source-terminal, a die-drain-terminal and a die-gate-terminal; a semiconductor-die; an insulated-gate-depletion-mode-transistor provided on the semiconductor-die, the insulated-gate-depletion-mode-transistor comprising a depletion-source-terminal, a depletion-drain-terminal and a depletion-gate-terminal, wherein the depletion-drain-terminal is coupled to the die-drain-terminal and the depletion-gate-terminal is coupled to the die-source-terminal; an enhancement-mode-transistor comprising an enhancement-source-terminal, an enhancement-drain-terminal and an enhancement-gate-terminal, wherein the enhancement-source-terminal is coupled to the die-source-terminal, the enhancement-gate-terminal is coupled to the die-gate-terminal and the enhancement-drain-terminal is coupled to the depletion-source-terminal; and a clamp-circuit coupled between the depletion-source-terminal and the depletion-gate-terminal.
Driver for normally on III-nitride transistors to get normally-off functionality
A semiconductor device includes a depletion mode GaN FET and an integrated driver/cascode IC. The integrated driver/cascode IC includes an enhancement mode cascoded NMOS transistor which is connected in series to a source node of the GaN FET. The integrated driver/cascode IC further includes a driver circuit which conditions a gate input signal and provides a suitable digital waveform to a gate node of the cascoded NMOS transistor. The cascoded NMOS transistor and the driver circuit are formed on a same silicon substrate.
Semiconductor device and manufacturing method thereof
An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
Monolithic cascode multi-channel high electron mobility transistors
This disclosure provides semiconductor device including a first transistor with a first gate terminal, a first source terminal, and the first drain terminal, the first transistor being a depletion mode transistor and including a plurality of two-dimensional carrier channels of a conductivity type being one of a n-type or a p-type conductivity. The semiconductor device also includes a second transistor with a second gate terminal, a second source terminal, and a second drain terminal, the second transistor being an enhancement mode transistor, a gate-source interconnect forming an electrical connection between the first gate terminal and the second source terminal, and a drain-source interconnect forming an electrical connection between the first source terminal and the second drain terminal. The first transistor and the second transistor are fabricated on the same wafer or substrate.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
A DOUBLE-CHANNEL SEMICONDUCTOR DEVICE
A double-channel semiconductor device is presented herein. The double-channel semiconductor device is a cascode solution integrating two semiconductor channels: a HEMT channel (104) and a thin film transistor (TFT) channel (216). The HEMT channel can be an AIGaN/GaN HEMT channel and the TFT channel can be a polycrystalline silicon (polysilicon) TFT channel. The polysilicon TFT may advantageously operate in enhancement mode to realize an enhancement-mode cascode device.