This disclosure provides an array substrate and a preparation method thereof as well as a touch display device. The array substrate includes: a substrate; a plurality of gate lines and a plurality of data lines located on the substrate, wherein the plurality of gate lines extend along a first direction and are arranged in a second direction different from the first direction, the plurality of data lines extend in the second direction and are arranged in the first direction, the plurality of gate lines intersect with the plurality of data lines to define a plurality of pixel areas; and a plurality of touch signal lines located on the substrate, wherein the plurality of touch signal lines extend in the second direction, each of the plurality of touch signal lines comprises a lower touch signal line and an upper touch signal line, and an edge of the upper touch signal line is spaced apart from an edge of the lower touch signal line in the first direction.

A display device having a pad area and a display area is provided. The display device includes: a substrate; a pad structure on the substrate in the pad area; and a display element part on the substrate in the display area. The pad structure includes a first pad pattern, a second pad pattern on the first pad pattern, and a third pad pattern on the second pad pattern, and the display element part includes a light emitting element configured to emit light in a display direction. The second pad pattern has a first area and a second area, the second pad pattern and the third pad pattern do not contact each other in the first area, and the second pad pattern and the third pad pattern contact each other in the second area.

A memory device includes a plurality of memory cells. A first memory cell of the plurality of memory cells includes a first write transistor includes a first write gate, a first write source, and a first write drain. A first read transistor includes first read gate, a first read source, a first read drain, and a first body region separating the first read source from the first read drain. The first read source is coupled to the first write source. A first capacitor has a first upper capacitor plate coupled to the first write drain and a first lower capacitor plate coupled to the first body region of the first read transistor.

As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.

A display substrate, a method for manufacturing a display substrate and a display device are provided, and the display substrate includes: a base having a first surface, a second surface and a side surface, the base includes a display area and an epitaxial area; a driving functional layer in the display area and first binding electrodes in the epitaxial area on the first surface, the first binding electrodes are coupled with the driving functional layer; second binding electrodes located on the second surface and coupled with the first binding electrodes through side wirings; a portion of each side wiring is located on the side surface; a blocking wall on the first surface and in the epitaxial area, an orthographic projection of the blocking wall on the base at least passes through spacing regions between every two adjacent first binding electrodes along an arrangement direction of the first binding electrodes.

Some embodiments include an integrated assembly having a first semiconductor material between two regions of a second semiconductor material. The second semiconductor material is a different composition than the first semiconductor material. Hydrogen is diffused within the first and second semiconductor materials. The conductivity of the second semiconductor material increases in response to the hydrogen diffused therein to thereby create a structure having the second semiconductor material as source/drain regions, and having the first semiconductor material as a channel region between the source/drain regions. A transistor gate is adjacent the channel region and is configured to induce an electric field within the channel region. Some embodiments include methods of forming integrated assemblies.

A semiconductor device including: a first gate electrode; a first gate insulating layer on the first gate electrode; a first oxide semiconductor layer on the first insulating layer; source and drain electrodes connected to the first oxide semiconductor layer; a second gate insulating layer on the first oxide semiconductor layer; a second oxide semiconductor layer on the second gate insulating layer; a second gate electrode on the second oxide semiconductor layer, the second gate electrode being in contact with the second oxide semiconductor layer; a first insulating layer on the second gate electrode, the first insulating layer having a part of a first aperture overlapping with the second oxide semiconductor layer in a planar view; and a first connecting electrode electrically connecting the first gate electrode and the second gate electrode via the first aperture.

A method of fabricating an array substrate is provided. The array substrate includes a display region and a non-display region. The array substrate further includes a substrate, a first transparent layer disposed on the substrate corresponding to the display region, an interlayer insulating layer disposed on the substrate, and a second transparent layer disposed on the interlayer insulating layer.

A stretchable display device and a method for fabricating the same is provided. A display device includes a substrate including a plurality of island patterns and a first bridge pattern connecting a first island pattern and a second island pattern adjacent to each other from among the plurality of island patterns, and a plurality of pixel light emitting chips, a pixel light emitting chip from among the plurality of pixel light emitting chips located on a corresponding island pattern from among the plurality of island patterns. Each of the plurality of pixel light emitting chips includes a transistor layer including a plurality of transistors, and a light emitting element layer on the transistor layer, and including a plurality of light emitting elements.

A polishing slurry is disclosed which includes about 0.01 wt % to about 10 wt % of polishing particles, about 0.005 wt % to about 0.1 wt % of a dispersing agent, about 0.001 wt % to about 1 wt % of an oxide-polishing promoter including a pyridine compound, about 0.05 wt % to about 0.1 wt % of a nitride-polishing inhibitor including an amino acid or an anionic organic acid, and water. A method for manufacturing a display device including an active pattern disposed on a base substrate, a gate metal pattern including a gate electrode overlapping the active pattern, a planarized insulation layer disposed on the gate metal pattern, and a source metal pattern disposed on the planarized insulation layer is also disclosed.