To realize a high-performance liquid crystal display device or light-emitting element using a plastic film. A CPU is formed over a first glass substrate and then, separated from the first substrate. A pixel portion having a light-emitting element is formed over a second glass substrate, and then, separated from the second substrate. The both are bonded to each other. Therefore, high integration can be achieved. Further, in this case, the separated layer including the CPU serves also as a sealing layer of the light-emitting element.

It is an object to provide a flexible light-emitting device with long lifetime in a simple way and to provide an inexpensive electronic device with long lifetime using the flexible light-emitting device. A flexible light-emitting device is provided, which includes a substrate having flexibility and a light-transmitting property with respect to visible light; a first adhesive layer over the substrate; an insulating film containing nitrogen and silicon over the first adhesive layer; a light-emitting element including a first electrode, a second electrode facing the first electrode, and an EL layer between the first electrode and the second electrode; a second adhesive layer over the second electrode; and a metal substrate over the second adhesive layer, wherein the thickness of the metal substrate is 10 pm to 200 pm inclusive. Further, an electronic device using the flexible light-emitting device is provided.

A method for thermal exfoliation includes providing a target layer on a substrate to form a structure. A stressor layer is deposited on the target layer. The structure is placed in a temperature controlled environment to induce differential thermal expansion between the target layer and the substrate. The target layer is exfoliated from the substrate when a critical temperature is achieved such that the target layer is separated from the substrate to produce a standalone, thin film device.

There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.

Systems and methods herein relate to the fabrication of a single-crystal flexible semiconductor template that may be attached to a semiconductor device. The template fabricated comprises a plurality of single crystals grown by lateral epitaxial growth on a seed layer and bonded to a flexible substrate. The layer grown has portions removed to create windows that add to the flexibility of the template.

The present invention provides a double-sided display substrate and a manufacturing method thereof and a display device. The double-sided display substrate includes several sub-pixel units, the sub-pixel unit includes a front side light-emitting layer provided for front side displaying, a back side light-emitting layer provided for back side displaying, a pixel electrode layer, a common electrode layer, and a driving transistor, and the front side light-emitting layer and the back side light-emitting layer are interposed between a corresponding pixel electrode layer and the common electrode layer, respectively, the common electrode layer corresponding to the back side light-emitting layer and/or the front side light-emitting layer is disposed in the same layer as a gate electrode layer of the driving transistor. According to the double-sided display substrate, quick manufacture and spread of the double-sided display substrate are realized.

A supporting device includes a main body and a ring-shaped glue layer. The main body includes a top surface and a bottom surface opposite to the top surface. The top surface defines a first groove. The first groove is substantially ring-shaped. The glue layer is arranged in the top surface and surrounds the first groove. A plurality of glass-frits is distributed in the glue layer. A thickness of the main body is approximately in a range from 0.5 millimeters to 0.8 millimeters. The glue layer is directly attached the top surface.

A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a polymer substrate and an interfacial layer over the polymer substrate. A buried oxide layer resides over the interfacial layer, and a device layer with at least a portion of a field effect device resides over the buried oxide layer. The polymer substrate is molded over the interfacial adhesion layer and has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity greater than 10.sup.12 Ohm-cm. Methods of manufacture for the semiconductor device include removing a wafer handle to expose a first surface of the buried oxide layer, disposing the interfacial adhesion layer onto the first surface of the buried oxide layer, and molding the polymer substrate onto the interfacial adhesion layer.

A multi-layer semiconductor device includes at least two semiconductor structures, each of the at least two semiconductor structures having first and second opposing surfaces and including a first section and a second section. The second section includes a device layer and an insulating layer. The multi-layer semiconductor device also includes one or more conductive structures and one or more interconnect pads. Select ones of the one or more interconnect pads are electrically coupled to the one or more conductive structures. The multi-layer semiconductor device additionally includes a via joining layer disposed between and coupled to second surfaces of each of the at least two semiconductor structures. A corresponding method for fabricating a multi-layer semiconductor device is also provided.

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.