An integrated circuit die with two material layers having metal nano-particles and the method of forming the same are provided. The integrated circuit die includes a device layer comprising a first transistor, a first interconnect structure on a first side of the device layer, a first material layer on the first interconnect structure, wherein the first material layer comprises first metal nano-particles, and a second material layer bonded to the first material layer, wherein the second material layer comprises second metal nano-particles, and wherein the first material layer and the second material layer share an interface.

A 3D semiconductor device, the device including: a first level including a first single crystal layer and including first transistors which each includes a single crystal channel; a first metal layer; a second metal layer overlaying the first metal layer; a second level including second transistors, first memory cells including at least one second transistor, and overlaying the second metal layer; a third level including third transistors and overlaying the second level; a fourth level including fourth transistors, second memory cells including at least one fourth transistor, and overlaying the third level, where at least one of the second transistors includes a metal gate, where the first level includes memory control circuits which control writing to the second memory cells, and at least one Phase-Lock-Loop (PLL) circuit or at least one Digital-Lock-Loop (DLL) circuit.

Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 32.

A lightweight flexible light-emitting device which is able to possess a curved display portion and display a full color image with high resolution and the manufacturing process thereof are disclosed. The light-emitting device comprises: a plastic substrate; an insulating layer with an adhesive interposed therebetween; a thin film transistor over the insulating layer; a protective insulating film over the thin film transistor; a color filter over the protective insulating film; an interlayer insulating film over the color filter; and a white-emissive light-emitting element formed over the interlayer insulating film and being electrically connected to the thin film transistor.

A 3D semiconductor device including: a first level including a first single crystal layer and first transistors, which each include a single crystal channel; a first metal layer with an overlaying second metal layer; a second level including second transistors, overlaying the first level; a third level including third transistors, overlaying the second level; a fourth level including fourth transistors, overlaying the third level, where the second level includes first memory cells, where each of the first memory cells includes at least one of the second transistors, where the fourth level includes second memory cells, where each of the second memory cells includes at least one of the fourth transistors, where the first level includes memory control circuits, where second memory cells include at least four memory arrays, each of the four memory arrays are independently controlled, and at least one of the second transistors includes a metal gate.

Disclosed is a method for manufacturing a display panel. The method includes: providing a display back plate, wherein the display back plate is provided with a light emitting side; attaching a protective film on the light emitting side of the display back plate, wherein the protective film comprises a transparent adhesive layer disposed on the display back plate and a heavy release film disposed on a side, distal from the display back plate, of the transparent adhesive layer; treating the transparent adhesive layer; and removing the heavy release film, and attaching a functional layer on a side, distal from the display back plate, of the transparent adhesive layer.

A semiconductor device includes source and drain regions above a substrate layer and a dielectric bar between each of the source and drain regions. Each of the source and drain regions has a filleted shape, with a bottom portion of the filleted shape including a horizontal bottom surface connecting two sloped surfaces. Two sloped surfaces on a backside of the semiconductor device are surrounded by a metal contact.

A semiconductor device includes a substrate, a channel layer, an insulating layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The channel layer over the substrate and includes two dimensional (2D) material. The insulating layer is on the channel layer. The source/drain contacts are over the channel layer. The gate dielectric layer is over the insulating layer and the channel layer. The gate electrode is over the gate dielectric layer and between the source/drain contacts.

In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The microdevices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.

An electronic display includes a substrate and a thin-film transistor (TFT) layer deposited on a top surface of the substrate. The TFT layer includes a plurality of driving TFTs that are configured to provide current to one or more organic light emitting diodes (OLEDs). The electronic display also includes an emission layer deposited on a top surface of the TFT layer. The emission layer includes emission areas and non-emission areas that separate the emission areas. The emission areas include a plurality of OLEDs and each of the OLEDs are configured to be driven by one or more of the TFTs to emit light. The electronic display also includes a reflective layer formed on a bottom surface of the substrate. The reflective layer is configured to reflect at least some of the light emitted from the OLEDs toward the non-emission areas.