A manufacturing method of a thin film transistor array panel according to an exemplary embodiment of the present invention includes forming an amorphous silicon thin film on a substrate. A lower region of the amorphous silicon thin film is crystallized to form a polycrystalline silicon thin film by irradiating a laser beam with an energy density of from about 150 mj/cm.sup.2 to about 250 mj/cm.sup.2 to the amorphous silicon thin film.

An organic light emitting display includes a pixel circuit to supply current to an organic light emitting device. The pixel circuit includes a switching transistor and a driving transistor. The switching transistor includes a first insulating layer between a first gate electrode and an oxide semiconductor layer. The driving transistor includes a second gate electrode on an active layer. The first insulating layer is between the active layer and the second gate electrode.

The present invention provides a method for manufacturing an LTPS TFT substrate structure and a structure of an LTPS TFT substrate. The method for manufacturing the LTPS TFT substrate structure according to the present invention provides patterns of a thermally conductive electrical-insulation layer that are of the same size and regularly distributed under a buffer layer of a driving TFT area to absorb heat in a subsequent excimer laser annealing process so as to speed up the cooling rate of amorphous silicon to form crystal nuclei that gradually grow up in the annealing process. Since the thermally conductive electrical-insulation layer is made up of regularly distributed and size-consistent patterns, crystal grains of a polycrystalline silicon layer located in the driving TFT area show improved consistency and homogeneity and the grain sizes are relatively large to ensure the consistency of electrical property of the driving TFT. The structure of the LTPS TFT substrate structure according to the present invention includes patterns of a thermally conductive electrical-insulation layer that are regularly distributed under a buffer layer of a driving TFT area and have the same size, so that crystal grains of a polycrystalline silicon layer located in the driving TFT area show improved consistency and homogeneity and the grain sizes are relatively large and thus, the electrical property of the driving TFT is consistent.

A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.

A method of compensating for Mura in a display panel includes displaying a high gray-scale image and a low gray-scale image on a display panel. The displayed images are photographed to generate a high gray-scale luminance image and a low gray-scale luminance image. An ELA Mura for-measurement image having moir-removed luminance values is generated by dividing luminance values of the low gray-scale luminance image by luminance values of the high gray-scale luminance image. One-dimensional average data is obtained from the ELA Mura for-measurement image. The one-dimensional average data is transformed into frequency-domain data. Target frequency-domain data having a maximum peak value is identified from the frequency-domain data. A direction, an intensity, and a frequency of the ELA Mura are obtained from the target frequency-domain data. A filter is determined based on the obtained information. The filter is applied to image data.

In accordance with some embodiments of the disclosed subject of matter, a TFT array substrate, a method for fabricating the TFT array substrate, and a display panel that comprises the TFT array substrate are provided. In some embodiments, the TFT array substrate comprises: a substrate; an active layer comprising a first region, a source region, a drain region, and a second region between the drain region and the first region; a gate electrode above the first insulating layer, wherein the gate electrode substantially covers the first region; and a first light-shielding layer that overlaps with the first region and substantially covers the second region.

A TFT and manufacturing method thereof, an array substrate and manufacturing method thereof, an X-ray detector and a display device are disclosed. The manufacturing method includes: forming a gate-insulating-layer thin film (3), a semiconductor-layer thin film (4) and a passivation-shielding-layer thin film (5) successively; forming a pattern (5) that includes a passivation shielding layer through one patterning process, so that a portion, sheltered by the passivation shielding layer, of the semiconductor-layer thin film forms a pattern of an active layer (4a); and performing an ion doping process to a portion, not sheltered by the passivation shielding layer, of the semiconductor-layer thin film to form a pattern comprising a source electrode (4c) and a drain electrode (4b). The source electrode (4c) and the drain electrode (4b) are disposed on two sides of the active layer (4a) respectively and in a same layer as the active layer (4a). The manufacturing method can reduce the number of patterning processes and improve the performance of the thin film transistor in the array substrate.

A method of manufacturing a polysilicon (poly-Si) layer, a method of manufacturing an organic light-emitting display apparatus using the method, and an organic light-emitting display apparatus manufactured by using the method. The method includes forming an amorphous silicon (a-Si) layer on a substrate having first and second areas, thermally treating the a-Si layer to partially crystallize the a-Si layer into a partially crystallized Si layer, removing a thermal oxide layer through a thermal treatment, selectively irradiating the first areas with laser beams to crystallize the partially crystallized Si layer.

A thin film transistor array panel according to an exemplary embodiment of the present invention includes: an insulating substrate; a polycrystal semiconductor layer formed on the insulating substrate; a buffer layer formed below the polycrystal semiconductor layer and containing fluorine; a gate electrode overlapping the polycrystal semiconductor layer; a source electrode and a drain electrode overlapping the polycrystal semiconductor layer and separated from each other; and a pixel electrode electrically connected to the drain electrode.

An array substrate, a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof are disclosed. The method for manufacturing the TFT comprises: forming a pattern of an active layer and a gate insulating layer provided with a metal film on a base substrate; patterning the metal film by one patterning process, and forming patterns of a gate electrode, a source electrode, a drain electrode, a gate line and a data line; forming a passivation layer on the base substrate; patterning the passivation layer by one patterning process, and forming a source contact hole, a drain contact hole and a bridge structure contact hole; and forming a transparent conductive film on the base substrate, and removing partial transparent conductive film to form a source contact portion, a drain contact portion (214), a pixel electrode and a bridge structure. The manufacturing method can reduce the number of the patterning processes.