A display apparatus includes a substrate, a gate electrode overlapping the substrate, and a semiconductor layer positioned between the substrate and the gate electrode. The semiconductor layer includes a first layer and a second layer positioned between the first layer and the gate electrode. A hydrogen content of the first layer is greater than a hydrogen content of the second layer.

A display device that is suitable for increasing in size is achieved. Three or more source lines are provided for each pixel column. Video signals having the same polarity are input to adjacent source lines during one frame period. Dot inversion driving is used to reduce a flicker, crosstalk, or the like.

A display device includes: a substrate; and a semiconductor layer disposed on the substrate, and including a first area, a second area, and a third area that are sequentially positioned by dividing the semiconductor layer into three areas in a thickness direction of the semiconductor layer, wherein the semiconductor layer includes polycrystalline silicon, a concentration of fluorine contained in the semiconductor layer has a first peak value in the first area and a second peak value in the third area, and the first peak value of the concentration of the fluorine in the semiconductor layer is about 30% or less of the second peak value of the concentration of the fluorine in the semiconductor layer.

In accordance with some embodiments of the disclosed subject of matter, a TFT array substrate, a method for fabricating the TFT array substrate, and a display panel that comprises the TFT array substrate are provided. In some embodiments, the TFT array substrate comprises: a substrate; an active layer comprising a first region, a source region, a drain region, and a second region between the drain region and the first region; a gate electrode above the first insulating layer, wherein the gate electrode substantially covers the first region; and a first light-shielding layer that overlaps with the first region and substantially covers the second region.

A display panel includes: a substrate including a first substrate layer which includes a glass material and a second substrate layer contacting the first substrate layer and which includes a polymer material; a thin film transistor disposed on the substrate; and a light emitting element disposed on the thin film transistor.

A method of manufacturing a low temperature polycrystalline silicon thin film and a thin film transistor, a thin film transistor, a display panel and a display device are provided. The method includes: forming an amorphous silicon thin film (01) on a substrate (1); forming a pattern of a silicon oxide thin film (02) covering the amorphous silicon thin film (01), a thickness of the silicon oxide thin film (02) located at a preset region being larger than that of the silicon oxide thin film (02) located at other regions; and irradiating the silicon oxide thin film (02) by using excimer laser to allow the amorphous silicon thin film (01) forming an initial polycrystalline silicon thin film (04), the initial polycrystalline silicon thin film (04) located at the preset region being a target low temperature polycrystalline silicon thin film (05). The polycrystalline silicon thin film has more uniform crystal size.

A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.

An array substrate is disclosed. The array substrate includes a substrate, a first film layer on a side surface of the substrate, an insulation layer on the side surface of the substrate, an electrostatic charge dispersion layer on the side surface of the substrate, and a second film layer arranged on the side surface of the substrate. The first film layer, the insulation layer, the electrostatic charge dispersion layer, and the second film layer are sequentially arranged on the substrate. In addition, the insulation layer and the electrostatic charge dispersion layer include via holes, the second film layer is electrically connected with the first film layer through the via holes, and the electrostatic charge dispersion layer is in a same profile as the second film layer.

To provide a semiconductor device including element layers that are stacked. A first wiring layer and a second wiring layer are stacked between a first element layer and a second element layer. A third wiring layer and a fourth wiring layer are stacked over the second element layer. Transistors of logic cells are provided in the first element layer. Wirings of the logic cells are provided in the first wiring layer or the second wiring layer. Input ports and output ports of the logic cells are provided in the third wiring layer. The input port of one of the logic cells is connected to the output port of another logic cell through the wiring of the third wiring layer or the fourth wiring layer. Connecting the logic cells through the wiring layers over the second element layer improves the efficiency of steps of arranging and connecting the logic cells.

An array substrate, a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof are disclosed. The method for manufacturing the TFT comprises: forming a pattern of an active layer and a gate insulating layer provided with a metal film on a base substrate; patterning the metal film by one patterning process, and forming patterns of a gate electrode, a source electrode, a drain electrode, a gate line and a data line; forming a passivation layer on the base substrate; patterning the passivation layer by one patterning process, and forming a source contact hole, a drain contact hole and a bridge structure contact hole; and forming a transparent conductive film on the base substrate, and removing partial transparent conductive film to form a source contact portion, a drain contact portion (214), a pixel electrode and a bridge structure. The manufacturing method can reduce the number of the patterning processes.