The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.

The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.

Provided is a composite substrate which has a high-performance semiconductor layer. A composite substrate of the present invention comprises: a supporting substrate which is formed of an insulating material; a semiconductor layer which is formed of a single crystal semiconductor that is superposed on and joined to the supporting substrate; and interfacial inclusions which are present in the interface between the supporting substrate and the semiconductor layer at a density of 10.sup.12 atoms/cm.sup.2 or less, and which are formed of a metal element that is different from the constituent elements of the supporting substrate and the semiconductor layer.

A method for producing SOS substrates which can be incorporated into a semiconductor production line, and is capable of producing SOS substrates which have few defects and no variation in defects, and in a highly reproducible manner, or in other words, a method for producing SOS substrates by: forming an ion-injection region (3) by injecting ions from the surface of a silicon substrate (1); adhering the ion-injection surface of the silicon substrate (1) and the surface of a sapphire substrate (4) to one another directly or with an insulating film (2) interposed therebetween; and then obtaining an SOS substrate (8) having a silicon layer (6) on the sapphire substrate (4), by detaching the silicon substrate in the ion-injection region (3). This method is characterized in that the orientation of the sapphire substrate (4) is a C-plane having an off-angle of 1 degree or less.

Substrate-transferred, deep trench isolation silicon-on-insulator (SOI) semiconductor devices formed from bulk semiconductor wafers are disclosed. In this regard, a bulk semiconductor wafer is provided that includes a bulk body, one or more transistors formed in the bulk body, and deep trenches formed between the transistors formed in the bulk body to provide isolation between the transistors. To prevent the bulk body from electrically interconnecting the transistors, the bulk body is thinned near, at, or beyond a back side of the deep trenches formed in the bulk body to form separate bulk bodies for each transistor isolated by the deep trenches. An insulation substrate is bonded to the bulk semiconductor device to form an SOI wafer. In this manner, residual bulk bodies of the transistors in the SOI wafer are isolated between the deep trenches and the insulation substrate to reduce or avoid leakage current between transistors.

A semiconductor device includes a first source/drain structure and a second source/drain structure of a first transistor. The semiconductor device includes a first source/drain structure and a second source/drain structure of a first transistor. The semiconductor device includes a third source/drain structure and a fourth source/drain structure of a second transistor. The second source/drain structure and the third source/drain structure merges as a common source/drain structure. The semiconductor device includes a first interconnect structure extending along a first lateral direction and disposed above the common source/drain structure. The semiconductor device includes a first dielectric structure interposed between the first interconnect structure and the common source/drain structure.

In a first step S101, a first region in which a polarity inversion layer is formed, and a second region in which the polarity inversion layer is not formed are provided on a substrate. Next, in a second step S102, a first nitride semiconductor is epitaxially grown on the substrate having the first region and the second region along the c-axis direction such that a first semiconductor layer is formed. Next, in a third step S103, a second nitride semiconductor is epitaxially grown on the first semiconductor layer along the c-axis direction such that a second semiconductor layer is formed on the first semiconductor layer. The second nitride semiconductor has different polarization, electron affinity, and band-gap energy from the first nitride semiconductor. The second semiconductor layer forms a heterojunction with the first semiconductor layer. The interface therebetween has a polarization charge, which is positive or negative depending on polarity.

In a first step S101, a first region in which a polarity inversion layer is formed, and a second region in which the polarity inversion layer is not formed are provided on a substrate. Next, in a second step S102, a first nitride semiconductor is epitaxially grown on the substrate having the first region and the second region along the c-axis direction such that a first semiconductor layer is formed. Next, in a third step S103, a second nitride semiconductor is epitaxially grown on the first semiconductor layer along the c-axis direction such that a second semiconductor layer is formed on the first semiconductor layer. The second nitride semiconductor has different polarization, electron affinity, and band-gap energy from the first nitride semiconductor. The second semiconductor layer forms a heterojunction with the first semiconductor layer. The interface therebetween has a polarization charge, which is positive or negative depending on polarity.