Disclosed are an array substrate and a display panel. The array substrate includes a substrate and a first transistor disposed on the substrate. The first transistor includes a first active layer disposed on the substrate, a first channel portion, a first doped portion, a second doped portion, a first gate disposed on one side of the first active layer, a source and a drain. The first doped portion and the second doped portion are connected to opposite ends of the first channel portion, respectively. The first doped portion includes a first doped sub-portion and a second doped sub-portion connected between the first channel portion and the first doped sub-portion. A doping concentration of ions in the second doped sub-portion is less than that in the first doped sub-portion, and a doping concentration of ions in the first doped sub-portion is the same as that in the second doped portion.

The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.

A semiconductor device is provided that includes a deep trench defining an active region, and a fin-type pattern protruding within the active region. The fin-type pattern having a lower portion, an upper portion of a narrower width than the lower portion, and a first stepped portion formed at a boundary between the upper portion and the lower portion. The device also includes a first field insulating film surrounding the lower portion and a second field insulating film formed on the first field insulating film and partially surrounding the upper portion.

An imaging device with excellent imaging performance is provided. In the imaging device, a first layer, a second layer, and a third layer have a region overlapping with one another, the first layer and the second layer each include transistors, and the third layer includes a photoelectric conversion element. Off-state currents of the transistors formed in the first layer are lower than those of the transistors formed in the second layer, and field-effect mobilities of the transistors formed in the second layer are higher than those of the transistors formed in the first layer.

An array substrate includes a substrate, driving TFTs, and switch TFTs directly on the substrate. The driving TFT includes a buffer layer, a gate, a first gate insulator layer, a second gate insulator layer, and a metal oxide semiconductor layer stacked in that order on the substrate, and a source electrode and a drain electrode coupled to the metal oxide semiconductor layer. The switch TFT includes a buffer layer, a gate, a second gate insulator layer, and a metal oxide semiconductor layer stacked in that order on the substrate, and a source electrode and a drain electrode coupled to the metal oxide semiconductor layer.

A display device includes a thin film transistor layer provided with a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first semiconductor layer and a first gate electrode. The second thin film transistor includes a second semiconductor layer and a second gate electrode. The first gate electrode includes a thick film electrode portion and a thin film electrode portion in such a manner as to overlap the thick film electrode portion and protrude from the thick film electrode portion toward at least one side in a channel length direction. The first semiconductor layer is provided with a low-concentration impurity region in such a manner as to overlap a portion of the thin film electrode portion protruding from the thick film electrode portion. A lower conductive layer is provided on a base substrate side of the second semiconductor layer.

A thin film transistor (TFT), a manufacturing method thereof, a display substrate and a display device are disclosed. The TFT includes: a gate electrode; a gate insulating layer disposed on the gate electrode; a first active layer disposed on the gate insulating layer; a second active layer disposed on the first active layer, having a length smaller than that of the second active layer; a source electrode disposed on the first active layer, being contacted with a first side of the second active layer; and a drain electrode disposed on the first active layer, being contacted with a second side of the second active layer. Embodiments of the present invention can increase an ON-state current and meanwhile reduce an OFF leakage current in the TFT.

An imaging device with excellent imaging performance is provided. In the imaging device, a first layer, a second layer, and a third layer have a region overlapping with one another, the first layer and the second layer each include transistors, and the third layer includes a photoelectric conversion element. Off-state currents of the transistors formed in the first layer are lower than those of the transistors formed in the second layer, and field-effect mobilities of the transistors formed in the second layer are higher than those of the transistors formed in the first layer.

The present invention provides a display panel and a display device. In the display panel, edges of multiple rows of pixel units are arranged in a step-like manner, each row of pixel units include a central pixel unit and a marginal pixel unit, each central pixel unit includes first thin film transistors each corresponding to a sub-pixel and having a first semiconductor region; each marginal pixel unit includes second thin film transistors each corresponding to a sub-pixel and having a second semiconductor region; length and width of the first semiconductor region are respectively set to be a first set length and a first set width, length and width of the second semiconductor region are respectively set to be a second set length and a second set width such that brightness of the marginal pixel unit is smaller than brightness of the central pixel unit during display.

Disclosed is a thin film transistor array panel including: a substrate including a display area and a peripheral area; a second semiconductor layer disposed on the substrate, and disposed on a first semiconductor layer disposed in the display area and the peripheral area; and a passivation layer disposed on the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer include an oxide semiconductor, and a thickness of the first semiconductor layer is different from that of the second semiconductor layer.