An array substrate and a display panel. In the array substrate, orthographic projections of a first scan line connected to a first oxide transistor and a second scan line connected to a second oxide transistor on the substrate are separated from an orthographic projection of a first connection line connected between the first oxide transistor and a first transistor, and an orthographic projection of a second connection line connected between the first oxide transistor and the second oxide transistor on the substrate, thereby solving a problem of lateral crosstalk.

A display element includes a substrate, a three-colored LED light emitting structure, a first insulation layer, a first active device layer, at least one conductive via and at least one electrode. The three-colored LED light emitting structure is located on the substrate. The first insulation layer is located on the fourth semiconductor layer. The first active device layer is located on the first insulation layer, and the first active device layer includes at least one transistor. The conductive via extends from the first active device layer to and electrically connects at least one of the first semiconductor layer, the second semiconductor layer, the third semiconductor layer and the fourth semiconductor layer. The electrode is located upon the first active device layer.

Provided is an electro-optical device including a transistor, a pixel electrode provided on a light incidence side of the transistor, a lens layer provided in a layer between the transistor and the pixel electrode, and a relay layer serving as a first relay layer that is provided in a layer between the lens layer and the pixel electrode and electrically connected to the pixel electrode, wherein the relay layer includes WSi on the pixel electrode side.

A memory device includes a plurality of memory cells. A first memory cell of the plurality of memory cells includes a first write transistor includes a first write gate, a first write source, and a first write drain. A first read transistor includes first read gate, a first read source, a first read drain, and a first body region separating the first read source from the first read drain. The first read source is coupled to the first write source. A first capacitor has a first upper capacitor plate coupled to the first write drain and a first lower capacitor plate coupled to the first body region of the first read transistor.

An array substrate, a preparation method thereof and a display apparatus are provided. The array substrate includes a plurality of pixel units distributed in a matrix and a plurality of scan lines and a plurality of data lines. Each pixel unit includes a display region and a device region. The display region includes a pixel electrode and a common electrode. The pixel electrode at least partially overlaps with the common electrode to form a first storage capacitor. The device region includes a drive transistor. The gate extends in a direction towards the display region to form a first extension portion; the drain extends in the direction towards the display region to form a second extension portion. The second extension portion is electrically connected to the pixel electrode. The first extension portion and the second extension portion overlap to form a second storage capacitor.

One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line; a preceding stage signal is supplied to the second signal line; a second clock signal is supplied to the third signal line; an output signal is output from the fourth signal line. Duty ratios of the first clock signal and the second clock signal are different from each other. A period during which the second clock signal is changed from an L-level signal to an H-level signal after the first clock signal is changed from an H-level signal to an L-level signal is longer than a period during which the preceding stage signal is changed from an L-level signal to an H-level signal.

An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 510.sup.19 atoms/cm.sup.3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.

According to some embodiments of the present disclosure, a display device includes an active pattern including a metal oxide, a gate electrode overlapping the active pattern, a first capacitor electrode spaced apart from the active pattern and including a conductive oxide, and a second capacitor electrode on the first capacitor electrode.

Some embodiments include an integrated assembly having a first semiconductor material between two regions of a second semiconductor material. The second semiconductor material is a different composition than the first semiconductor material. Hydrogen is diffused within the first and second semiconductor materials. The conductivity of the second semiconductor material increases in response to the hydrogen diffused therein to thereby create a structure having the second semiconductor material as source/drain regions, and having the first semiconductor material as a channel region between the source/drain regions. A transistor gate is adjacent the channel region and is configured to induce an electric field within the channel region. Some embodiments include methods of forming integrated assemblies.

Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. A second source electrode of the second thin-film transistor and a second gate electrode of the second thin-film transistor overlap each other with an upper interlayer insulation film interposed therebetween so as to form a first storage capacitor.