Disclosed is a display apparatus having a substrate including a display area and a non-display area adjacent to the display area. Here, the substrate may be variable, pliable, rollable, flexible, foldable, stretchable, bendable, wearable, or the like. The display apparatus includes a plurality of connection wirings disposed on the substrate. The display apparatus includes a cover window disposed at least over the plurality of connection wirings. The display apparatus includes a light-blocking pattern part included in the cover window.

In a thin film transistor layer, a first semiconductor film made of an oxide semiconductor, a first gate insulating film made of an inorganic insulating film, a first metal film, a first interlayer insulating film made of an inorganic insulating film, a second metal film, a protective insulating film made of an inorganic insulating film, and a flattening film made of an organic resin material are sequentially layered. The protective insulating film includes a thin film portion provided at a portion where a plurality of first wiring lines formed of the first metal film and a plurality of second wiring lines formed of the second metal film intersect with each other so as to be thinner than a portion of the protective insulating film around the intersecting portion.

In a thin film transistor layer, a first semiconductor film made of an oxide semiconductor, a first gate insulating film made of an inorganic insulating film, a first metal film, a first interlayer insulating film made of an inorganic insulating film, a second metal film, a protective insulating film made of an inorganic insulating film, and a flattening film made of an organic resin material are sequentially layered. The protective insulating film includes a thin film portion provided at a portion where a plurality of first wiring lines formed of the first metal film and a plurality of second wiring lines formed of the second metal film intersect with each other so as to be thinner than a portion of the protective insulating film around the intersecting portion.

A semiconductor device including a transistor having a minute size is provided. In the semiconductor device, a second conductive layer is provided over a first conductive layer; the second conductive layer has a first opening overlapping with the first conductive layer; a third conductive layer is provided over the second conductive layer; the third conductive layer has a second opening overlapping with the first opening; a first insulating layer is in contact with a sidewall of the first opening in the second conductive layer; a semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface of the third conductive layer; a second insulating layer is provided over the semiconductor layer; a fourth conductive layer is provided over the second insulating layer; the first insulating layer includes a region sandwiched between the sidewall of the first opening in the second conductive layer and the semiconductor layer; and the semiconductor layer includes a region sandwiched between the sidewall of the first opening in the second conductive layer and the fourth conductive layer.

A semiconductor device including a transistor having a minute size is provided. In the semiconductor device, a second conductive layer is provided over a first conductive layer; the second conductive layer has a first opening overlapping with the first conductive layer; a third conductive layer is provided over the second conductive layer; the third conductive layer has a second opening overlapping with the first opening; a first insulating layer is in contact with a sidewall of the first opening in the second conductive layer; a semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface of the third conductive layer; a second insulating layer is provided over the semiconductor layer; a fourth conductive layer is provided over the second insulating layer; the first insulating layer includes a region sandwiched between the sidewall of the first opening in the second conductive layer and the semiconductor layer; and the semiconductor layer includes a region sandwiched between the sidewall of the first opening in the second conductive layer and the fourth conductive layer.

A semiconductor device having a high degree of integration is provided. A first and second transistors which are electrically connected to each other and a first insulating layer are included. The first transistor includes a first semiconductor layer, a second insulating layer, and a first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and a fourth to sixth conductive layers. The first insulating layer is positioned over the first conductive layer and includes an opening reaching the first conductive layer. The second conductive layer is positioned over the first insulating layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The third conductive layer is positioned over the second insulating layer to overlap with the inner wall of the opening. The third insulating layer is positioned over the fourth conductive layer. The fifth and sixth conductive layers are positioned over the fourth conductive layer with the third insulating layer therebetween. The second semiconductor layer is in contact with top surfaces of the fifth and sixth conductive layers, side surfaces thereof that face each other, and a top surface of the third insulating layer sandwiched between the fifth conductive layer and the sixth conductive layer.

A semiconductor device having a high degree of integration is provided. A first and second transistors which are electrically connected to each other and a first insulating layer are included. The first transistor includes a first semiconductor layer, a second insulating layer, and a first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and a fourth to sixth conductive layers. The first insulating layer is positioned over the first conductive layer and includes an opening reaching the first conductive layer. The second conductive layer is positioned over the first insulating layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The third conductive layer is positioned over the second insulating layer to overlap with the inner wall of the opening. The third insulating layer is positioned over the fourth conductive layer. The fifth and sixth conductive layers are positioned over the fourth conductive layer with the third insulating layer therebetween. The second semiconductor layer is in contact with top surfaces of the fifth and sixth conductive layers, side surfaces thereof that face each other, and a top surface of the third insulating layer sandwiched between the fifth conductive layer and the sixth conductive layer.

An array substrate and a display panel. In the array substrate, orthographic projections of a first scan line connected to a first oxide transistor and a second scan line connected to a second oxide transistor on the substrate are separated from an orthographic projection of a first connection line connected between the first oxide transistor and a first transistor, and an orthographic projection of a second connection line connected between the first oxide transistor and the second oxide transistor on the substrate, thereby solving a problem of lateral crosstalk.

An array substrate and a display panel. In the array substrate, orthographic projections of a first scan line connected to a first oxide transistor and a second scan line connected to a second oxide transistor on the substrate are separated from an orthographic projection of a first connection line connected between the first oxide transistor and a first transistor, and an orthographic projection of a second connection line connected between the first oxide transistor and the second oxide transistor on the substrate, thereby solving a problem of lateral crosstalk.

Provided is a display apparatus including a substrate, a repair line disposed on the substrate, an insulating layer covering the repair line, a first thin-film transistor disposed in the insulating layer, a first connection line disposed on the insulating layer and at least a portion of the repair line, and a light-emitting element disposed on the first connection line and connected to the first connection line, wherein the insulating layer includes a first groove on the repair line.