A multijunction solar cell including an upper first solar subcell having an emitter and base layers forming a photoelectric junction; a second solar subcell disposed under and adjacent to the upper first solar subcell, and having an emitter and base layers forming a photoelectric junction; and a third solar subcell disposed under and adjacent to the second solar subcell and having an emitter and base layers forming a photoelectric junction; wherein at least one of the base and emitter layers of at least a particular solar subcell from among the upper first solar subcell, the second solar subcell, and the third solar subcell has a graded band gap throughout at least a portion of thickness of its active layer adjacent to the photoelectric junction and being in a range of 20 to 300 MeV less than a band gap in the active layer in both the emitter layer and the base layer spaced away from the photoelectric junction.

In one embodiment described herein, a device includes optically reflective metal patches positioned within a dielectric substrate. A dielectric barrier layer separates the reflective metal patches and the dielectric substrate to prevent diffusion of the reflective metal into the dielectric substrate. An optically transparent dielectric spacer layer is deposited thereon, and an array of metal elements extend from the dielectric spacer layer. A dielectric coating is applied to the top wall and sidewalls of each metal element. A conductive barrier material is positioned between the base wall of each metal element and the dielectric spacer layer. A tunable dielectric material is positioned within the gaps between adjacent metal elements.

A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including CuZnSnS(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device.

A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including CuZnSnS(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device.

A solar cell apparatus according to the embodiment includes a support substrate; a back electrode layer on the support layer; a light absorbing layer on the back electrode layer; a plurality of buffer layers on the light absorbing layer, the plurality of buffer layers having a bandgap gradually increased from a bottom thereof to a top thereof; and a window layer on the buffer layers.

A method of forming a multijunction solar cell comprising at least an upper subcell, a middle subcell, and a lower subcell, the method including forming a first alpha layer over said middle solar subcell using a surfactant and dopant including selenium, the first alpha layer configured to prevent threading dislocations from propagating; forming a metamorphic grading interlayer over and directly adjacent to said first alpha layer; forming a second alpha layer using a surfactant and dopant including selenium over and directly adjacent to said grading interlayer to prevent threading dislocations from propagating; and forming a lower solar subcell over said grading interlayer such that said lower solar subcell is lattice mismatched with respect to said middle solar subcell.

A photovoltaic solar cell comprises a nano-patterned substrate layer. A plurality of nano-windows are etched into an intermediate substrate layer to form the nano-patterned substrate layer. The nano-patterned substrate layer is positioned between an n-type semiconductor layer composed of an n-type semiconductor material and a p-type semiconductor layer composed of a p-type semiconductor material. Semiconductor material accumulates in the plurality of nano-windows, causing a plurality of heterojunctions to form between the n-type semiconductor layer and the p-type semiconductor layer.

Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10.

Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10.

A photovoltaic device having three dimensional (3D) charge separation and collection, where charge separation occurs in 3D depletion regions formed between a p-type doped group III-nitride material in the photovoltaic device and intrinsic structural imperfections extending through the material. The p-type group III-nitride alloy is compositionally graded to straddle the Fermi level pinning by the intrinsic structural imperfections in the material at different locations in the group III-nitride alloy. A field close to the surfaces of the intrinsic defects separates photoexcited electron-hole pairs and drives the separated electrons to accumulate at the surfaces of the intrinsic defects. The intrinsic defects function as n-type conductors and transport the accumulated electrons to the material surface for collection. The compositional grading also creates a potential that drives the accumulated separated electrons toward an n-type group III-nitride layer for collection. The p-type group III-nitride alloy may comprise an alloy of InGaN, InAlN or InGaAlN.