H10F10/00

Various applications of fiber reinforced high temperature superconductors
12198851 · 2025-01-14 · ·

A composition comprises a plurality of continuous ordered fibers embedded in a high temperature superconducting material, wherein the plurality of continuous ordered fibers comprise a core and a reinforcing material. A composition comprises one or more large diameter continuous fibers embedded in a high temperature superconducting material; and one or more small diameter continuous fibers embedded in a high temperature superconducting material. A composition comprising one or more continuous fibers embedded in a high temperature superconducting material, wherein a fiber of the one or more continuous fibers comprise a core and reinforcing material, and wherein one or more magnetic particles are embedded in the core of the fiber.

Manufacture and structures for fiber reinforced high temperature superconductors
12205763 · 2025-01-21 · ·

A method comprises growing a longitudinal a-b plane high temperature superconducting crystal with a long fiber reinforced seed crystal; and cutting off the long fiber reinforced seed crystal from the longitudinal a-b plane high temperature superconducting crystal. A method comprises adding high temperature superconducting constituent powders; adding intermediate solid state powders to the constituent powders; disposing fiber reinforcement within the intermediate solid state powders and the constituent powders; compressing the intermediate solid state powders and the constituent powders with the fiber reinforcement to form a high temperature superconducting shape; and heating the high temperature superconducting shape to crystalize. A composition comprises a plurality HTS segments, wherein a HTS segment comprises one or more continuous fibers embedded in a high temperature superconducting material; and a wire or a tape, which is mechanically and electrically coupled between a first HTS segment and a second HTS segment.

Integrated photovoltaic panel circuitry
12218628 · 2025-02-04 · ·

A photovoltaic module is presented, which may include a photovoltaic panel and a converter circuit having a primary input connected to the photovoltaic panel and a secondary output galvanically isolated from the primary input. The primary input may be connectible to multiple input terminals within a junction box and at least one of the input terminals may be electrically connected to a ground. The photovoltaic module may include multiple interconnected photovoltaic cells connected electrically to multiple connectors (for example bus-bars). The photovoltaic module may include input terminals operable for connecting to the connectors and an isolated converter circuit. The isolated converter circuit may include a primary input connected to the input terminals and a secondary output galvanically isolated from the primary input.

Power module substrate, heat-sink-attached power-module substrate, and heat-sink-attached power module

A power-module substrate including a circuit layer having a first aluminum layer bonded on one surface of a ceramic substrate and a first copper layer bonded on the first aluminum layer by solid-phase-diffusion bonding, and a metal layer having a second aluminum layer made from a same material as the first aluminum layer and bonded on the other surface of the ceramic substrate and a second copper layer made from a same material as the first copper layer and bonded on the second aluminum layer by solid-phase-diffusion bonding, in which a thickness t1 of the first copper layer is 1.7 mm to 5 mm, a sum of the thickness t1 of the first copper layer and a thickness t2 of the second copper layer is 7 mm or smaller, and a ratio t2/t1 is larger than 0 and 1.2 or smaller except for a range of 0.6 to 0.8.

MEMBER FOR SOLID-STATE IMAGE PICKUP DEVICE AND METHOD FOR MANUFACTURING SOLID-STATE IMAGE PICKUP DEVICE

A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.

WIRE TRANSFER APPARATUS OF TABBING APPARATUS
20170229601 · 2017-08-10 · ·

Provided is a wire transfer apparatus of a tabbing apparatus. A wire transfer apparatus of a tabbing apparatus according to the present invention includes: a first transfer gripper unit configured to grip a wire; a second transfer gripper unit disposed in parallel to the first transfer gripper unit and configured to grip the wire at a location spaced apart from the first transfer gripper unit together with the first transfer gripper unit; and a gripper transfer unit configured to transfer the wire while moving the first transfer gripper unit and the second transfer gripper unit.

SEMICONDUCTOR STRUCTURE AND IMAGE SENSOR
20170221940 · 2017-08-03 ·

A semiconductor structure includes a substrate having a front surface and a back surface. The semiconductor structure further includes a first isolation structure extending from the front surface into the substrate, the first isolation structure having a depth D.sub.1 from the front surface. The semiconductor structure further includes a second isolation structure extending from the front surface into the substrate, the second isolation structure having a depth D.sub.2 from the front surface. The semiconductor structure further includes a first etching stop feature in the substrate and contacting the first isolation structure. The semiconductor structure further includes a second etching stop feature in the substrate and contacting the second isolation structure.

Member for solid-state image pickup device and method for manufacturing solid-state image pickup device

A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.

Detachment of a self-supporting layer of silicon <100>

A method for detaching a self-supporting layer of silicon of crystalline orientation <100>, particularly with the aim of applications in the field of photovoltaics, wherein the method includes the steps of: a) Implanting ionic species in a substrate made of silicon having a crystalline orientation <100> so as to create an embrittlement plane in the substrate, delimiting on both sides a self-supporting layer and a negative of the substrate, and b) Applying a heat treatment to the substrate implanted at step a) with a temperature ramp greater than 30 C./s so as to detach the self-supporting layer of silicon.

Solar Cell Emitter Region Fabrication Using Self-Aligned Implant and Cap
20170162729 · 2017-06-08 ·

Methods of fabricating solar cell emitter regions using self-aligned implant and cap, and the resulting solar cells, are described. In an example, a method of fabricating an emitter region of a solar cell involves forming a silicon layer above a substrate. The method also involves implanting, through a stencil mask, dopant impurity atoms in the silicon layer to form implanted regions of the silicon layer with adjacent non-implanted regions. The method also involves forming, through the stencil mask, a capping layer on and substantially in alignment with the implanted regions of the silicon layer. The method also involves removing the non-implanted regions of the silicon layer, wherein the capping layer protects the implanted regions of the silicon layer during the removing. The method also involves annealing the implanted regions of the silicon layer to form doped polycrystalline silicon emitter regions.