An image sensor includes a substrate that includes a first surface and a second surface that are opposite to each other, where the substrate includes a plurality of pixel areas; an isolation pattern that extends from the first surface and into the substrate, where the isolation pattern is between the plurality of pixel areas; and an antireflection layer on the isolation pattern, where the isolation pattern includes: a first device isolation pattern that contacts the antireflection layer; and a second device isolation pattern that is spaced apart from the antireflection layer, where the first device isolation pattern includes: a first dielectric layer; and a conductive reflection layer on the first dielectric layer, and where a top surface of the conductive reflection layer and a top surface of the first dielectric layer extend from the second surface of the substrate by a same distance.

Improvement of pixel characteristics is achieved. A light detecting device includes a semiconductor layer and first and second separation areas disposed in the semiconductor layer. The first separation area includes an insulating film that fills a first dug part extending in a thickness direction of the semiconductor layer and of which a refractive index is lower than that of the semiconductor layer, and the second separation area includes a conductive film filling a second dug part extending in the thickness direction of the semiconductor layer.

Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates. Some aspects of the present disclosure relate to techniques for manufacturing and operating integrated circuits according to the other techniques described herein.

Provided is a solid-state image capturing apparatus that can, between an image height center and positions where the image height becomes higher, align the impact of incident light with respect to light-blocking films. The solid-state image capturing apparatus is provided with a semiconductor substrate in which multiple pixels are disposed in a matrix. Each of the multiple pixels is provided with a photoelectric conversion unit that generates charge according to photoelectric conversion based on light incident on a light-receiving surface of the semiconductor substrate, a charge accumulating unit that accumulates the charge generated by the photoelectric conversion unit, a transfer transistor that transfers charge from the photoelectric conversion unit to the charge accumulating unit and has a vertical gate electrode that reaches the photoelectric conversion unit, and a light-blocking section that is formed by a trench disposed within a layer between the light-receiving surface and the charge accumulating unit and blocks light that is incident via the light-receiving surface from being incident on the charge accumulating unit. An amount of cover by the light-blocking section with respect to the charge accumulating unit is corrected according to an image height of a position where the pixel is disposed.

A glassless wafer-level optical sensor semiconductor package is provided. A method of manufacturing a glassless wafer-level optical sensor package of an example includes: forming one or more dams at least partially surrounding one or more optical sensors on a wafer; supporting the wafer on a carrier substrate via the one or more dams; forming a wafer-level optical sensor integrated circuit for each of the one or more optical sensors on the wafer by: performing a through-silicon via process on the wafer; forming an isolation layer on the wafer; and performing a passivation operation on the wafer; removing the wafer from the carrier substrate; and singulating each wafer-level optical sensor integrated circuit.

A device is disclosed. The device includes a plurality of pixels disposed over a first surface of a semiconductor layer. The device includes a device layer disposed over the first surface. The device includes metallization layers disposed over the device layer. One of the metallization layers, closer to the first surface than any of other ones of the metallization layers, includes at least one conductive structure. The device includes an oxide layer disposed over a second surface of the semiconductor layer, the second surface being opposite to the first surface, the oxide layer also lining a recess that extends through the semiconductor layer. The device includes a spacer layer disposed between inner sidewalls of the recess and the oxide layer. The device includes a pad structure extending through the oxide layer and the device layer to be in physical contact with the at least one conductive structure.

A structure for a front-side image sensor comprises a semiconductor substrate, an electrically insulating layer overlying the semiconductor substrate, and an active layer overlying the electrically insulating layer. The semiconductor substrate comprises a trapping layer, the trapping layer including cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the active layer to the electrically insulating layer. The plurality of electrically isolating trenches define a plurality of pixels. Also disclosed is a structure comprises a carrier substrate, an electrically insulating layer overlying the carrier substrate and a trapping layer, and a semiconductive layer overlying the electrically insulating layer. The trapping layer comprises cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the semiconductive layer to the electrically insulating layer.

[Problem] Provided is a technique useful for reducing functional problems in a semiconductor device caused by cracks which may form in a semiconductor substrate. [Solution] A semiconductor device includes: a plurality of first pixel isolation portions, each extending from a front surface of a substrate toward a rear surface of the substrate, and each having an insulator; and a plurality of second pixel isolation portions, each extending from the rear surface of the substrate toward the front surface of the substrate, and each having an insulator. In one cross-section of the substrate, the plurality of second pixel isolation portions form a plurality of rear surface spacing extension portions which are isolated from each other and which extend locally from the rear surface of the substrate toward the front surface of the substrate. A distance between one or more of the plurality of rear surface spacing extension portions and the front surface of the substrate is different from a distance between another one or more of the plurality of rear surface spacing extension portions and the front surface of the substrate.

A substrate laminate (10) includes a first substrate (11), a second substrate (12), and a cured product layer (13) interposed between the first substrate (11) and the second substrate (12). The cured product layer (13) is patterned, and includes a first layer (14) including a cured product of a first developable composition, and a second layer (15) including a cured product of a second developable composition, in this order from a first substrate (11) side. The first developable composition contains a polymerizable first curable compound and a first photopolymerization initiator and is free of a colorant. The second developable composition contains a polymerizable second curable compound, a second photopolymerization initiator, and a colorant.

A process for fabricating a detecting device includes producing a getter pad based on amorphous carbon resting on a mineral sacrificial layer that covers a thermal detector and producing a thin encapsulating layer that rests on the mineral sacrificial layer and that covers an upper face and sidewalls of the getter pad. The mineral sacrificial layer is removed via a first chemical etch, and a protective segment of the getter pad is removed via a second chemical etch.