An integrated microwave photonics (IMWP) apparatus is provided using sapphire as a platform. The IMWP apparatus includes: a sapphire substrate having a step-terrace surface; and a III-V stack layer epitaxially grown on the sapphire substrate. The III-V stack layer includes: a first III-V layer disposed on the sapphire substrate; a low temperature (LT) III-V buffer layer disposed on the first III-V layer; multiple second III-V layers disposed and stacked on the LT III-V buffer layer; a third III-V layer disposed on the second III-V layers; a III-V quantum well layer disposed on the third III-V layers; and a fourth III-V layer disposed on the III-V quantum well layer. The second III-V layers are respectively annealed. A growth temperature of the LT III-V layer and a growth temperature of the III-V quantum well layer are lower than a growth temperature of each of the first, second, third and fourth III-V layers.

A PIN diode detector includes a substrate. The PIN diode detector further includes a plurality of PIN diode wells in a pixel region, wherein each of the plurality of PIN diode wells has a first dopant type. The PIN diode detector further includes a connecting ring well and a plurality of floating ring wells in a peripheral region, wherein the connecting ring well and plurality of floating ring wells have the first dopant type. The PIN diode detector further includes a field stop ring well surrounding the plurality of floating ring wells, wherein the field stop ring well has a second dopant type opposite the first dopant type. The PIN diode detector further includes a blanket doped region. The blanket doped region extends continuously through an entirety of the pixel region and an entirety of the peripheral region, and the blanket doped region has the second dopant type.

A radiation image-pickup device includes: a plurality of pixels configured to generate signal charge based on radiation; and a field effect transistor used to read out the signal charge from the plurality of pixels. The transistor includes a first silicon oxide film, a semiconductor layer, and a second silicon oxide film laminated in order from a substrate side, the semiconductor layer including an active layer, and a first gate electrode disposed to face the semiconductor layer, with the first or the second silicon oxide film interposed therebetween, and the first or the second silicon oxide film or both include an impurity element.

As a cost effective alternative to lithography, there is provided a method of forming an electronic device comprising the steps of: depositing a first quantity of a first liquid medium comprising a dopant on a first portion of a planar surface and depositing a second quantity of the first liquid medium on a second portion of the surface, the first quantity spaced from the second quantity by a gap; heating the first quantity, the second quantity, and the surface, the heating configured to cause diffusion of at least some of the dopant from the first liquid medium into the surface; depositing a dielectric material on the surface in the gap; selectively removing the first quantity and the second quantity from the surface; depositing an electrical contact on each of the first portion and the second portion; and depositing a further electrical contact on the dielectric material.

A semiconductor device includes a first semiconductor layer; an insulation member layer formed on the first semiconductor layer; a transistor disposed in an upper portion of the insulation member layer; a first interlayer insulation film covering the transistor; a layered member including a wiring layer formed on the first interlayer insulation film and a second interlayer insulation film; and a first penetrating electrode penetrating through the insulation member layer, the first interlayer insulation film, and the layered member. The first penetrating electrode is electrically connected only to the first semiconductor layer.

A semiconductor device includes a first semiconductor layer of a first conductivity type having a primary surface on one side thereof and a secondary surface on an opposite side thereof, and having a sensor therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein, the second semiconductor layer being formed at said one side of the primary surface of the first semiconductor layer, an insulating layer formed between the first semiconductor layer and the second semiconductor layer, and being disposed on the primary surface of the first semiconductor layer, and a charge-attracting semiconductor layer of the first conductivity type configured to attract electrical charges generated in the insulating layer when a fixed voltage is supplied to the charge-attracting semiconductor layer.

Methods for discriminating among x-ray beams of distinct energy content. A first volume of scintillation medium converts energy of incident penetrating radiation into scintillation light which is extracted from a scintillation light extraction region by a plurality of optical waveguides that convert the scintillation light to light of a longer wavelength. An x-ray beam initially incident upon the first volume of scintillation medium and traversing the first volume is then incident on a second volume of scintillation medium. The first and second scintillation media may be separated by an absorber or one or more further volumes of scintillation medium, and may also have differential spectral sensitivities. Scintillation light from the first and second scintillation volumes is detected in respective detectors and processed to yield a measure of respective low energy and high-energy components of the incident x-ray beam.

A method of manufacturing an image sensor device includes providing a metalized thin film transistor layer on a glass substrate; forming an inter-layer dielectric layer on the metalized thin film transistor layer; forming a via through the inter-layer dielectric layer; forming a metal layer the inter-layer dielectric and within the inter-layer dielectric layer via for contacting the metalized thin film transistor layer; forming a bank layer on the metal layer and the inter-layer dielectric layer; forming a via through the bank layer; forming an electron transport layer on the bank layer and within the bank layer via for contacting an upper surface of the metal layer; forming a bulk heterojunction layer on the electron transport layer; forming a hole transport layer on the bulk heterojunction layer; and forming a top contact layer on the hole transport layer.

A semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in a semiconductor substrate, quenching resistors connected in series to the respective avalanche photodiodes and arranged on a first principal surface side of the semiconductor substrate, and a plurality of through-hole electrodes electrically connected to the quenching resistors and formed so as to penetrate the semiconductor substrate from the first principal surface side to a second principal surface side. A mounting substrate includes a plurality of electrodes arranged corresponding to the respective through-hole electrodes on a third principal surface side. The through-hole electrodes and the electrodes are electrically connected through bump electrodes, and a side surface of the semiconductor substrate and a side surface of a glass substrate are flush with each other.

The present disclosure provides a semiconductor device including: a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.