H10F39/802

METHOD FOR RECORDING IMAGE DATA
20250008052 · 2025-01-02 ·

A method for recording image data by means of a camera, in particular by means of a motion picture camera, is provided. In this respect, the camera comprises an image sensor with an adjustable sensitivity that comprises a plurality of light-sensitive detector elements arranged in rows and columns and that is configured to generate a respective electric charge in dependence on the intensity of light that is incident on a respective detector element during a respective single exposure, to amplify said respective electric charge in dependence on the set sensitivity and to convert it into a respective image signal value. The method comprises: a recording sensitivity and a target sensitivity being predefined, wherein the recording sensitivity deviates from the target sensitivity by an exposure correction value; image data being recorded by means of the camera while the sensitivity of the image sensor is set to the recording sensitivity; a noise correction being determined in dependence on the target sensitivity and/or the exposure correction value; and corrected image data being generated by modifying the recorded image data based on the noise correction.

IMAGING DEVICE AND SEMICONDUCTOR DEVICE
20250006754 · 2025-01-02 ·

An imaging device and a semiconductor device that can reduce the capacitance of a gate electrode are provided. The imaging device includes a photoelectric conversion element and a semiconductor device that reads charge generated by the photoelectric conversion element. The semiconductor device includes a semiconductor substrate and a field-effect transistor provided on the first surface side of the semiconductor substrate. The field-effect transistor includes a gate electrode including a buried gate portion buried from the first surface of the semiconductor substrate toward an inside of the semiconductor substrate, a gate insulating film disposed between the semiconductor substrate and the gate electrode, a source region provided on the semiconductor substrate and connected to one side of the gate electrode in a gate length direction of the gate electrode, and a drain region connected to the other side of the gate electrode in the gate length direction. The buried gate portion includes a first site, and a second site located between at least one of the source region and the drain region and the first region, and having a thickness from the first surface smaller than that of the first region.

IMAGE SENSOR AND METHOD OF FABRICATING THE SAME
20240413177 · 2024-12-12 ·

Disclosed are image sensors and methods of fabricating the same. The image sensor includes a semiconductor substrate including a pixel zone and a pad zone and having a first surface and a second surface opposing each other, a first pad separation pattern on the pad zone and extending from the first surface of the semiconductor substrate toward the second surface of the semiconductor substrate, a second pad separation pattern extending from the second surface toward the first surface of the semiconductor substrate on the pad zone the second pad and in contact with the first pad separation pattern, and a pixel separation pattern on the pixel zone and extending from the second surface of the semiconductor substrate toward the first surface of the semiconductor substrate.

CMOS IMAGING SENSOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
20240413175 · 2024-12-12 ·

A CMOS imaging sensor structure and a manufacturing method therefor. The CMOS imaging sensor structure comprises a pixel unit of the CMOS imaging sensor set on a semiconductor substrate, the pixel unit comprises a circuit device region and a first photosensitive region, the circuit device region is set on the frontside of the semiconductor substrate, the first photosensitive region is set correspondingly in the semiconductor substrate below the circuit device region, the circuit device region is isolated from the first photosensitive region by an isolation region, and the circuit device region is electrical connected with the first photosensitive region through a conductive trench, a fill factor of a photosensitive region is increased, and performances of a reading circuit is increased by a more optimized design scheme. A second photosensitive region of the pixel unit can also be set on the semiconductor substrate on a side of the circuit device region, thus a larger photosensitive region can be formed together with the first photosensitive region. The present invention also provides a manufacturing method for the CMOS imaging sensor structure.

IMAGING DEVICE

In order to solve the foregoing problem, the present disclosure provides an imaging device composed of a plurality of pixels, wherein a first pixel among the plurality of pixels includes: a first photoelectric conversion element; a first power storage unit; a first transfer element that enables a conductive state or a non-conductive state between the first photoelectric conversion element and the first power storage unit; and a first amplifying element that amplifies an image signal on the basis of a charge stored by photoelectric conversion in at least any of adjacent pixels, including a second pixel, that are adjacent to the first pixel, the second pixel including: a second amplifying element that amplifies an image signal based on a charge stored in the first power storage unit by photoelectric conversion of the first photoelectric conversion element, and a second distance between the first power storage unit and the second amplifying element is shorter than a first distance between the first power storage unit and the first amplifying element.

CMOS image sensor having indented photodiode structure

The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.

Image sensor

An image sensor includes a first photodiode group, a second photodiode group, a first transfer transistor group, a second transfer transistor group, a floating diffusion region of a substrate in which electric charges generated in the first photodiode group are stored, and a power supply node for applying a power supply voltage to the second photodiode group. A barrier voltage is applied to at least one transfer transistor of the second transfer transistor group. The power supply voltage allows electric charges, generated in the second photodiode group, to migrate to the power supply node, and the barrier voltage forms a potential barrier between the second photodiode group and the floating diffusion region.

Integrated sensor with reduced skew

Aspects of the present disclosure relate to techniques for reducing skew in an integrated device, such as a CMOS imaging device. In some aspects, multiple pixels of an integrated circuit may be configured to receive a same control signal and conduct charge carriers responsive to the control signal substantially at the same time. In some aspects, an integrated circuit may have modulated charge transfer channel voltage thresholds, such as by having different charge transfer channel lengths, and/or a doped portion configured to set a voltage threshold for charge transfer. In some aspects, an integrated circuit may have a via structure having a plurality of vias extending between continuous portions of at least two metal layers. In some aspects, an integrated circuit may include a row of pixels and a voltage source configured to provide a voltage to bias a semiconductor substrate of the integrated circuit along the row of pixels.

Image sensor and semiconductor device including asymmetric active region

An image sensor includes: a first device isolation part in a substrate and defining an active region; a first gate electrode having a first and second gate sidewalls; and a first impurity region and a second impurity region adjacent to the first and second gate sidewalls, wherein the active region includes: a first active central part; a first active protrusion; and a second active protrusion, wherein the first device isolation part has a first isolation sidewall overlapping the first active central part, and wherein a first straight line is at least partially spaced apart from the first isolation sidewall, wherein the first straight line links a first point, at which the first active protrusion meets the first active central part, to a second point, at which the second active protrusion meets the first active central part.

IMAGE SENSOR

An image sensor that includes a substrate including a first photodiode (PD) region and a second PD region adjacent to the first PD region; a first PD having a first area in the first PD region; a second PD in the second PD region, the second PD having a second area smaller than the first area; a micro-lens on the substrate and covering the first PD region; and a light splitter between the substrate and the micro-lens, the light splitter including a material having a refractive index different from a refractive index of the micro-lens. The light splitter extends from the first PD region to the second PD region.