An N-type double-sided solar cell preparation method comprises: sequentially forming a front aluminum oxide passivation layer and a front silicon nitride anti-reflection layer on a front face of an N-type silicon wafer. The front aluminum oxide passivation layer is prepared by using a plasma-enhanced atomic layer deposition method, and the deposition conditions thereof involve: any frequency in the frequency range of 40 kHz to 400 kHz is selected to be a radio-frequency power supply frequency, a gaseous aluminum source is first introduced into a plasma apparatus in a vacuum state, such that a layer of aluminum source molecules is adsorbed on the surface of the silicon wafer, and a gaseous oxygen source is then introduced, such that the oxygen source is ionized into plasma and reacts with the aluminum source to obtain aluminum oxide.

A solar cell that incorporates a thin layer of iron oxide (FeO.sub.x), and a number of techniques for fabricating the solar cell, are presented. The thin layer of iron oxide, which may be derived from lunar regolith, may be the emitter of the solar cell. The solar cell may be a silicon hetero-junction (HJ) solar cell. The FeO.sub.x may be present in place of amorphous silicon (a-Si:H), MoO.sub.x, or various organic materials, for example. An emitter comprising FeO.sub.x may be beneficial for solar cell fabrication on the moon.

The present invention discloses a back contact solar cell. The back contact solar cell includes a semiconductor substrate having a front surface and a rear surface; a first conductive type semiconductor region having a first conductive type and a second conductive type semiconductor region having a second conductive type at an interval on the rear surface of the semiconductor substrate. Furthermore, the rear surface of the semiconductor substrate has a texturing structure at the interval between the first conductive type semiconductor region and the second conductive type semiconductor region.

The present application provides a preparation method and application of a crystalline silicon solar cell having a shallow junction diffusion emitter. The preparation method comprises a diffusion process and a chain oxidation process, the diffusion process comprises low temperature diffusion and high temperature propulsion, and the chain oxidation process comprises high-temperature chain oxidation. According to the present application, firstly, a low-doped diffusion shallow junction having a depth of 0.15 um is prepared by means of optimization of the diffusion process, and doping with a certain dose concentration is formed on the surface of a diffusion layer by using photon thermal activation radiation energy of high-temperature chain oxidation, so as to solve the mismatch problem of alloy ohmic contact subsequently formed with silver paste, and finally, the photoelectric conversion efficiency is improved to a high degree.

In a method for generating a textured surface of a semiconductor layer, a surface of the semiconductor layer is etched anisotropically with a first alkaline etching solution to generate a surface of the semiconductor layer including pyramid-shape textures. Subsequently, the surface including the pyramid-shaped textures is etched anisotropically with a second alkaline etching solution, which differs from the first alkaline etching solution, to cause material removal of the pyramid-shaped textures, thereby reducing a height difference between peaks and neighboring valleys of the pyramid-shaped textures. A method for manufacturing a tandem solar cell further includes generating a first solar cell structure of the tandem solar cell including the textured surface, and generating a second solar cell structure of the tandem solar cell on the side of the first solar cell structure on which the textured surface is arranged.

The present application relates to automatic decision-making for pulling. Multi-dimensional data cleaning is performed and dimensional data warehouse is established by processing, filtering and converting basic source data of pulling nodes in a pulling process for monocrystal pulling-up into data sets easily identified and marked and establishing respective models based thereon. Basic source data of a current pulling nodes are obtained and converted into process parameters. The process parameters are compared with respective models in the dimensional data warehouse to obtain a first determination result. Data analysis is performed on the first determination result to determine whether an abnormality occurs in the current pulling process to obtain a second determination result. Decision is made automatically based on the second determination result.

A method for manufacturing semiconductor devices includes following steps. A substrate having a pixel region and a periphery region defined thereon is provided, and at least a transistor is formed in the pixel region. A blocking layer is formed on the substrate, and the blocking layer includes a first opening exposing a portion of the substrate in the pixel region and a second opening exposing a portion of the transistor. A first conductive body is formed in the first opening and a second conductive body is formed in the second opening, respectively. The first conductive body protrudes from the substrate and the second conductive body protrudes from the transistor. A portion of the blocking layer is removed. A first salicide layer is formed on the first conductive body and a second salicide layer is formed on the second conductive body, respectively.

A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.

In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.

Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.