Examples of a substrate processing apparatus includes a chamber configured to contain a stage, a light receiving device configured to receive light inside the chamber, and a substrate transfer apparatus that includes a shaft and a rotation arm configured to rotate with rotation of the shaft and is configured to supply a plurality of light beams having different amounts of light to the light receiving device.

A method for forming a back contact on an absorber layer in a photovoltaic device includes forming a two dimensional material on a first substrate. An absorber layer including CuZnSnS(Se) (CZTSSe) is grown over the first substrate on the two dimensional material. A buffer layer is grown on the absorber layer on a side opposite the two dimensional material. The absorber layer is exfoliated from the two dimensional material to remove the first substrate from a backside of the absorber layer opposite the buffer layer. A back contact is deposited on the absorber layer.

The present disclosure provides methods of fabricating a multijunction solar cell panel in which one or more of the steps are performed using an automated process. In some embodiments, the automated process uses machine vision.

A method of producing an optoelectronic semiconductor chip includes providing a growth substrate and a semiconductor layer sequence grown on the growth substrate with a main extension plane including a p-conductive layer, an active zone and an n-conductive layer, removing the semiconductor layer sequence in regions to form at least one aperture extending through the p-conductive layer and the active zone into the n-conductive layer of the semiconductor layer sequence, depositing a protective layer on a side of the semiconductor layer sequence facing away from the growth substrate, depositing an aluminum layer containing aluminum across the entire surface on a side of the semiconductor layer sequence facing away from the growth substrate, removing the growth substrate, and forming a mesa by removing the semiconductor layer sequence at the regions of the protective layer, wherein the protective layer is subsequently freely externally accessible at least in places.

A handle substrate having at least one metallization region is provided on a stressor layer that is located above a base substrate such that the at least one metallization region is in contact with a surface of the stressor layer. An upper portion of the base substrate is spalled, i.e., removed, to provide a structure comprising, from bottom to top, a spalled material portion of the base substrate, the stressor layer and the handle substrate containing the at least one metallization region in contact with the surface of the stressor layer.

An optoelectronic semiconductor component includes an optoelectronic semiconductor chip having a top area at a top side, a bottom area at an underside, and side areas connecting the top area and the bottom area; electrical contact locations at the top area or at the bottom area of the optoelectronic semiconductor chip; and an electrically insulating shaped body, wherein the optoelectronic semiconductor chip is a flip-chip having the electrical contract locations only at one side, either the underside or the top side, the shaped body surrounds the optoelectronic semiconductor chip at its side areas, and the shaped body is free of a via that electrically connects the optoelectronic semiconductor chip.

Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

A method of forming an electrode pattern includes: forming, on a base material, a seed layer having a pattern corresponding to the electrode pattern; forming an organic material layer on the seed layer; producing an electrode layer transfer sheet by forming an electrode layer on the organic material layer via an electroplating process using the seed layer as a seed; disposing the electrode layer transfer sheet on a substrate on which the electrode pattern is to be formed such that the electrode layer is in contact with the substrate and pressure bonding the electrode layer to the substrate; and in a state in which the electrode layer is pressure bonded to the substrate, removing the base material along with the organic material layer and the seed layer to transfer the electrode layer to the substrate.

Techniques for processing materials for manufacture of gallium-containing nitride substrates are disclosed. More specifically, techniques for fabricating and reusing large area substrates using a combination of processing techniques are disclosed. The methods can be applied to fabricating substrates of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others. Such substrates can be used for a variety of applications including optoelectronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photo detectors, integrated circuits, transistors, and others.

A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a first graded interlayer adjacent to the second solar subcell; the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the first graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A second graded interlayer is provided adjacent to the third solar subcell; the second graded interlayer having a fifth band gap greater than the fourth band gap; and a lower fourth solar subcell is provided adjacent to the second graded interlayer, the lower fourth subcell having a sixth band gap smaller than the fourth band gap such that the fourth subcell is lattice mismatched with respect to the third subcell.