A device for producing electrical current. In one embodiment, the device comprises a stack of epitaxial layers (from a bottom surface): a p-doped semiconductor reflector layer, a p-doped semiconductor emitter layer, an n-doped semiconductor base layer, and an n-doped semiconductor window layer. A radioisotope source, disposed above or in contact with an uppermost layer of the stack, produces radioisotope decay particles or gamma rays that impinge the stack. The electrical current is produced between the first and second conductive regions by action of the radioisotope decay particles or the gamma rays on the emitter and base layers.

A structure for a front-side image sensor comprises a semiconductor substrate, an electrically insulating layer overlying the semiconductor substrate, and an active layer overlying the electrically insulating layer. The semiconductor substrate comprises a trapping layer, the trapping layer including cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the active layer to the electrically insulating layer. The plurality of electrically isolating trenches define a plurality of pixels. Also disclosed is a structure comprises a carrier substrate, an electrically insulating layer overlying the carrier substrate and a trapping layer, and a semiconductive layer overlying the electrically insulating layer. The trapping layer comprises cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the semiconductive layer to the electrically insulating layer.

A process for fabricating a detecting device includes producing a getter pad based on amorphous carbon resting on a mineral sacrificial layer that covers a thermal detector and producing a thin encapsulating layer that rests on the mineral sacrificial layer and that covers an upper face and sidewalls of the getter pad. The mineral sacrificial layer is removed via a first chemical etch, and a protective segment of the getter pad is removed via a second chemical etch.

An optical detection module and a related manufacturing method are applied for chip scale package technology. The optical detection module includes a chip scale package assembly and a light sheltering layer. The chip scale package assembly includes a glass substrate, a detection chip, an isolation layer, a plurality of redistribution layers, and a plurality of conductive contacts. The detection chip is located above the glass substrate. The isolation layer is disposed on a surface of the detection chip opposite to the glass substrate. The plurality of redistribution layers is disposed on the isolation layer and spaced from each other, and having a plurality of conductive units. The plurality of conductive contacts is respectively disposed on the plurality of conductive units. The light sheltering layer is disposed on a lateral surface of the chip scale package assembly, and adapted to block light transmission and provide a covering protection function.

In one embodiment described herein, a device includes optically reflective metal patches positioned within a dielectric substrate. A dielectric barrier layer separates the reflective metal patches and the dielectric substrate to prevent diffusion of the reflective metal into the dielectric substrate. An optically transparent dielectric spacer layer is deposited thereon, and an array of metal elements extend from the dielectric spacer layer. A dielectric coating is applied to the top wall and sidewalls of each metal element. A conductive barrier material is positioned between the base wall of each metal element and the dielectric spacer layer. A tunable dielectric material is positioned within the gaps between adjacent metal elements.

A method of fabricating multijunction solar cell including an upper solar subcell and having an emitter of p conductivity type with a first band gap, and a base of n conductivity type with a second band gap greater than the first band gap; a lower solar subcell disposed below the upper solar subcell having an emitter of p conductivity type with a third band gap, and a base of n conductivity type with a fourth band gap greater than the third band gap; and an intermediate grading interlayer disposed between the upper and lower solar subcells and having a graded lattice constant that matches the upper first subcell on a first side and the second solar subcell on the second side opposite the first side, and having a fifth band gap that is greater than the second band gap of the upper solar subcell.

A method for producing a semiconductor layer sequence is disclosed. In an embodiment the includes growing a first nitridic semiconductor layer at the growth side of a growth substrate, growing a second nitridic semiconductor layer having at least one opening on the first nitridic semiconductor layer, removing at least pail of the first nitridic semiconductor layer through the at least one opening in the second nitridic semiconductor layer, growing a third nitridic semiconductor layer on the second nitridic semiconductor layer, wherein the third nitridic semiconductor layer covers the at least one opening at least in places in such a way that at least one cavity free of a semiconductor material is present between the growth substrate and a subsequent semiconductor layers and removing the growth substrate.

A three-dimensional thin-film semiconductor substrate with selective through-holes is provided. The substrate having an inverted pyramidal structure comprising selectively formed through-holes positioned between the front and back lateral surface planes of the semiconductor substrate to form a partially transparent three-dimensional thin-film semiconductor substrate.

A laser processing system can be utilized to produce high-performance interdigitated back contact (IBC) solar cells. The laser processing system can be utilized to ablate, transfer material, and/or laser-dope or laser fire contacts. Laser ablation can be utilized to remove and pattern openings in a passivated or emitter layer. Laser transferring may then be utilized to transfer dopant and/or contact materials to the patterned openings, thereby forming an interdigitated finger pattern. The laser processing system may also be utilized to plate a conductive material on top of the transferred dopant or contact materials.

A method for fabricating silicon-on-insulator (SOI) semiconductor devices, wherein the piezoresistive pattern is defined within a blanket doped layer after fusion bonding. This new method of fabricating SOI semiconductor devices is more suitable for simpler large scale fabrication as it provides the flexibility to select the device pattern/type at the latest stages of fabrication.