Patent classifications
H10F77/1223
ULTRATHIN SILICON OXYNITRIDE INTERFACE MATERIAL, TUNNEL OXIDE PASSIVATED STRUCTURE AND PREPARATION METHODS AND APPLICATIONS THEREOF
An ultrathin silicon oxynitride interface material, a tunnel oxide passivated structure and preparation methods and applications thereof are provided. The ultrathin silicon oxynitride interface material is an SiON film with a thickness of 1 nm to 4 nm, and the percentage content of N atoms is 1% to 40%. Compared with silicon oxide, the diffusion rate of boron in the SiON film of the present disclosure is low, which effectively reduces the damaging effect of boron, improves the integrity of the SiON film and maintains the chemical passivation effect. The SiON film with high nitrogen concentration can noticeably lower the concentration of boron on the silicon surface so as to lessen the boron-induced defects. Furthermore, the SiON film has an energy band structure approximate to silicon nitride, which increases the hole transport efficiency and hole selectivity, and further improves the passivation quality and reduces the contact resistivity.
SOLAR CELL AND MANUFACTURING METHOD THEREOF, AND PHOTOVOLTAIC SYSTEM
A solar cell and a manufacturing method thereof, and a photovoltaic system. The solar cell includes: a substrate layer including a first surface and a second surface arranged oppositely along a thickness direction thereof; a tunnel oxide layer, a first doped polysilicon layer, and a first passivation layer sequentially arranged on the first surface of the substrate layer in a direction gradually away from the substrate layer; and a first finger electrode layer, at least one of the first fingers being arranged in first connection holes, bottoms of the first connection holes being located in the first doped polysilicon layer, and the first fingers passing through the first connection holes corresponding thereto to be electrically connected to the first doped polysilicon layer; and in the first direction, widths of the first connection holes being all less than widths of the first fingers corresponding to the first connection holes. While ensuring good electrical connection, the solar cell causes less damage and recombination to a passivation structure of the solar cell, and has high photoelectric conversion efficiency.
Multi-junction photovoltaic cell having wide bandgap oxide conductor between subcells and method of making same
Increasing the power conversion efficiency of silicon (Si) photovoltaics is a key enabler for continued reductions in the cost of solar electricity. Disclosed herein is a multi-junction photovoltaic cell that does not utilize a conventional interconnection layer and instead places a wide bandgap oxide conductor, for example, a metal oxide such as TiO.sub.2, between a top light absorption layer having a relatively large bandgap and a bottom light absorption layer having a relatively small bandgap. The advantageous omission of a conventional interconnection layer between the two subcells is enabled by low contact resistivity between the top and bottom light absorbing layers provided by the wide bandgap oxide conductor. The absence of the conventional interconnect between the subcells significantly reduces both optical losses and processing steps. The disclosed photovoltaic cell may thus enable low-cost, high-efficiency multi-junction devices through less complex manufacturing processes and lower material costs.
DOUBLE-SIDED PASSIVATED CONTACT CELL AND PREPARATION METHOD THEREOF
The present disclosure provides a double-sided passivated contact cell, where a front side and a rear side of the double-sided passivated contact cell each are provided with a tunnel layer, a doped polysilicon layer, and a passivation layer sequentially from an inside to an outside; and for the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side, one of the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side is a boron and carbon co-doped polysilicon layer, and the other of the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side is a phosphorus and carbon co-doped polysilicon layer. The present disclosure further provides a preparation method of the double-sided passivated contact cell.
Solar cell and manufacture method thereof, and photovoltaic module
A solar cell is provided, including: a semiconductor substrate including a front surface and a rear surface arranged opposite to each other; an emitter located on the front surface of the semiconductor substrate; a front passivation layer located over the front surface of the semiconductor substrate; a tunneling layer located over the rear surface of the semiconductor substrate; a doped conductive layer located over a surface of the tunneling layer; a rear passivation layer located over a surface of the doped conductive layer; a front electrode in contact with the emitter; and a rear electrode in contact with the first doped conductive layer. The doped conductive layer includes a first doped conductive layer corresponding to a rear metallized region, and a second doped conductive layer corresponding to a rear non-metallized region. The first doped conductive layer has an oxygen content less than the second doped conductive layer.
BIFACIAL SOLAR CELL AND PREPARATION METHOD THEREFOR
In one aspect, a preparation method for a bifacial solar cell utilizes a method of deposition and then bombardment to form an intrinsic silicon layer, thus enhancing an ablation resistance of a solar cell, reducing a metal composite loss and a filing coefficient, and significantly improving an efficiency of an obtained solar cell. Moreover, in the bifacial solar cell of the present disclosure, compared with a second crystalline silicon doped layer, the intrinsic silicon layer has a higher number of SiH connected to mono-hydrogen atoms, a lower number of SiH.sub.2 connected to dihydrogen atoms, and fewer carrier recombination defects in the intrinsic silicon layer, thus improving field passivation performance.
Ultrananocrystalline diamond contacts for electronic devices
A method of forming electrical contacts on a diamond substrate comprises producing a plasma ball using a microwave plasma source in the presence of a mixture of gases. The mixture of gases include a source of a p-type or an n-type dopant. The plasma ball is disposed at a first distance from the diamond substrate. The diamond substrate is maintained at a first temperature. The plasma ball is maintained at the first distance from the diamond substrate for a first time, and a UNCD film, which is doped with at least one of a p-type dopant and an n-type dopant, is disposed on the diamond substrate. The doped UNCD film is patterned to define UNCD electrical contacts on the diamond substrate.
Apparatus For Reduction of Solar Cell LID
Reduction of solar wafer LID by exposure to continuous or intermittent High-Intensity full-spectrum Light Radiation, HILR, by an Enhanced Light Source, ELS, producing 3-10 Sols, optionally in the presence of forming gas or/and heating to within the range of from 100 C.-300 C. HILR is provided by ELS modules for stand-alone bulk/continuous processing, or integrated in wafer processing lines in a High-Intensity Light Zone, HILZ, downstream of a wafer firing furnace. A finger drive wafer transport provides continuous shadowless processing speeds of 200-400 inches/minute in the integrated furnace/HILZ. Wafer dwell time in the peak-firing zone is 1-2 seconds. Wafers are immediately cooled from peak firing temperature of 850 C.-1050 C. in a quench zone ahead of the HILZ-ELS modules. Dwell in the HILZ is from about 10 sec to 5 minutes, preferably 10-180 seconds. Intermittent HILR exposure is produced by electronic control, a mask, rotating slotted plate or moving belt.
Electronic Devices Comprising N-Type and P-Type Superlattices
A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.
NANOPILLAR MICROFLUIDIC DEVICES AND METHODS OF USE THEREOF
Described herein are microfluidic devices and methods of detecting an analyte in a sample that includes flowing the sample though a microfluidic device, wherein the presence of the analyte is detected directly from the microfluidic device without the use of an external detector at an outlet of the microfluidic device. In a more specific aspect, detection is performed by incorporating functional nanopillars, such as detector nanopillars and/or light source nanopillars, into a microchannel of a microfluidic device.