A photodetector device includes a germanium semiconductor layer including a plurality of nanostructures at an upper surface of the germanium semiconductor layer, a conductive layer on the plurality of nanostructures, the conductive layer and the germanium semiconductor layer forming a first Schottky junction, and a tunneling barrier layer between the germanium semiconductor layer and the conductive layer.

A semiconductor device, a manufacturing method therefor, and an electronic apparatus that reduces a parasitic capacitance generated between an internal electrode and a board silicon to suppress waveform distortion and signal delay of high-frequency signals, thereby enabling a high-speed operation. A configuration to include: a board silicon; a silicon oxide film stacked on the board silicon; an inter-wiring-layer film having an internal electrode stacked on the silicon oxide film; a through-hole forming a stepped hole with a larger-diameter hole extending from the board silicon to the silicon oxide film and a smaller-diameter hole extending from the silicon oxide film to the internal electrode; an interlayer dielectric film stacked on a circumferential side surface of the larger-diameter hole and the board silicon; and a redistribution layer on an inner peripheral surface of the through-hole and the interlayer dielectric film and connected to the internal electrode.

A semiconductor device, a manufacturing method therefor, and an electronic apparatus that reduces a parasitic capacitance generated between an internal electrode and a board silicon to suppress waveform distortion and signal delay of high-frequency signals, thereby enabling a high-speed operation. A configuration to include: a board silicon; a silicon oxide film stacked on the board silicon; an inter-wiring-layer film having an internal electrode stacked on the silicon oxide film; a through-hole forming a stepped hole with a larger-diameter hole extending from the board silicon to the silicon oxide film and a smaller-diameter hole extending from the silicon oxide film to the internal electrode; an interlayer dielectric film stacked on a circumferential side surface of the larger-diameter hole and the board silicon; and a redistribution layer on an inner peripheral surface of the through-hole and the interlayer dielectric film and connected to the internal electrode.

A uniform bridge gradient (UBG) time-of-flight (ToF) photodiode block is described, such as for integration with image sensor pixels. The UBG ToF photodiode block can be part of a UBG ToF pixel, and an image sensor can include an array of such pixels. Each UGB ToF photosensor block has multiple taps for selective activation, and a photodiode region designed for complete and rapid transit of photocarriers, as they are generated, via the multiple taps. Embodiments of the photodiode region include a photodiode-defining implant, a relatively shallow first bridging implant, and relatively deep second bridging implant. The bridging implants provide lateral bridging with a uniform doping gradient near and across the multiple taps.

A photoconductive transducer intended to generate or detect waves in the terahertz frequency domain or in the picosecond pulse domain is provided. The transducer comprises a three-dimensional structure that includes, in this order, a first planar electrode, an array of nano-columns embedded in a layer of resist and a second planar electrode parallel to the first planar electrode. The design of the transducer increases the optical-to-terahertz conversion efficiency by means of photonic and plasmonic resonances and by means of high and homogeneous electric fields. The height of the nano-columns as well as the thickness of the resist range between 100 nanometres and 400 nanometres. The width of the nano-columns is between 100 nanometres and 400 nanometres, the distance between two adjacent nano-columns is between 300 nanometres and 500 nanometres, the nano-columns are made of a III-V semiconductor. The second electrode is transparent, so as to allow the transmission of a laser source towards the photo-absorbing nano-columns.

A photovoltaic device includes a substrate, a semiconductor stack and a transparent tunnel junction. The semiconductor stack includes an n-type layer selected from a first transparent conductive oxide layer, or a window layer, or both; and a p-type absorber layer disposed on the n-type layer, wherein the absorber layer consists essentially of CdSexTe(1-x), wherein x is from 1 to about 40 at. %. The transparent tunnel junction comprises a transparent interface layer of Cd.sub.yZn.sub.(1-y)Te doped to be p+type, and a transparent contact layer doped to be n+type, and the interface layer is disposed between the p-type absorber layer and the transparent contact layer. In bifacial embodiments, the tunnel junction forms a transparent back contact and electrode; and in multi-junction embodiments, the tunnel junction forms a diode-like connector between top and bottom cells. The transparent contact layer may comprise tin oxide or zinc oxide doped with aluminum, fluorine or indium. The photovoltaic device may also include an electron reflector layer and/or an optical reflector layer.

A device includes an active region, an isolation structure, a gate structure, an interlayer dielectric (ILD) layer, a reading contact, and a sensing contact. The isolation structure laterally surrounds the active region. The gate structure is across the active region. The ILD layer laterally surrounds the gate structure. The reading contact is in contact with the isolation structure and is separated from the gate structure by a first portion of the ILD layer. The sensing contact is in contact with the isolation structure and is separated from the gate structure by a second portion of the ILD layer.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

The present technology relates to a semiconductor device and electronic equipment in which a semiconductor device that suppresses the occurrence of noise by a leakage of light can be provided.

A semiconductor device is configured which includes a light-receiving element 34, an active element for signal processing, and a light shielding structure 40 which is between the light-receiving element 34 and the active element to cover the active element and is formed of wirings 45 and 46. The semiconductor device further includes a first substrate on which the light-receiving element is formed, a second substrate on which the active element is formed, and a wiring layer which has a light shielding structure by the wirings which is formed on the second substrate, and in which the second substrate can be bonded to the first substrate through the wiring layer.

A solar cell capable of preventing short-circuiting during signaling connection and a method for manufacturing the solar cell. A solar cell includes a semiconductor substrate, a first semiconductor layer having a conductivity type different from that of the semiconductor substrate. The first semiconductor layer includes a main functional portion which has a first base end portion on one side in a first direction of the semiconductor substrate over an entire length in a second direction and a plurality of first collecting portions extending from the first base end portion toward the other side in the first direction and on which a first electrode pattern is stacked, and an isolation portion which is formed linearly at an end portion on the other side in the first direction of the semiconductor substrate over an entire length in the second direction and on which the first electrode pattern is not stacked.