A method for preparing a solar cell includes providing a substrate with a first conducting layer, the substrate including a first surface and a second surface opposite to each other in a thickness direction of the substrate, the first conducting layer being formed on the first surface; forming a first electrode pattern on a side of the first conducting layer away from the substrate, the first electrode pattern being electrically connected to the first conducting layer, the first electrode pattern including a first soldering pattern, the first soldering pattern being configured for soldering to one or more first bus ribbons; forming a first dielectric layer on a side of the first electrode pattern away from the substrate, and covering the first electrode pattern with the first dielectric layer; and removing a portion of the first dielectric layer corresponding to the first soldering pattern, and exposing the first soldering pattern.

A solar cell and a manufacturing method thereof, and a photovoltaic system. The solar cell includes: a substrate layer including a first surface and a second surface arranged oppositely along a thickness direction thereof; a tunnel oxide layer, a first doped polysilicon layer, and a first passivation layer sequentially arranged on the first surface of the substrate layer in a direction gradually away from the substrate layer; and a first finger electrode layer, at least one of the first fingers being arranged in first connection holes, bottoms of the first connection holes being located in the first doped polysilicon layer, and the first fingers passing through the first connection holes corresponding thereto to be electrically connected to the first doped polysilicon layer; and in the first direction, widths of the first connection holes being all less than widths of the first fingers corresponding to the first connection holes. While ensuring good electrical connection, the solar cell causes less damage and recombination to a passivation structure of the solar cell, and has high photoelectric conversion efficiency.

The formation of solar cell contacts using a laser is described. A method of fabricating a back-contact solar cell includes forming a poly-crystalline material layer above a single-crystalline substrate. The method also includes forming a dielectric material stack above the poly-crystalline material layer. The method also includes forming, by laser ablation, a plurality of contacts holes in the dielectric material stack, each of the contact holes exposing a portion of the poly-crystalline material layer; and forming conductive contacts in the plurality of contact holes.

Each solar cell 1 includes: a silicon substrate 2; a diffusion layer 3; a first collection electrode 4 contacting the diffusion layer 3; a first connection electrode 5 contacting the diffusion layer 3 and the first collection electrode 4; an insulation layer 7 having an opening portion extending therethrough; a second collection electrode 8 contacting the insulation layer 7 and connected to the single crystal silicon substrate 2 via the opening portion 70; and a second connection electrode 9 contacting the second collection electrode 8. The first connection electrode 5 and the second connection electrode 9 are separated from each other. The second collection electrode 8 and the single crystal silicon substrate 2 are separated from each other via the insulation layer 7 in almost all or all of an overlapping area of each two adjacent PERC solar cells 1.

Embodiments of the present disclosure relates to the field of solar cells, and in particular to a solar cell and a photovoltaic module. The solar cell includes: a substrate having a front surface and a rear surface; a first tunnel layer and a first doped conductive layer sequentially formed over the front surface of the substrate, the first tunnel layer and the first doped conductive layer are each aligned with a metal pattern region on the front surface; and a second tunnel layer and a second doped conductive layer sequentially formed over the rear surface of the substrate, and in a respective Raman spectrum, a full width at half maximum corresponding to the first doped conductive layer is not greater than a full width at half maximum corresponding to the second doped conductive layer.

A solar cell including: a substrate having front and back surfaces, the back surface including first and second regions staggered and spaced from each other, and a gap region provided between one first region and one adjacent second region, a plurality of first pyramidal texture structure regions formed corresponding to a plurality of gap regions and a distance between a top and bottom thereof is 2-4 m; a first conductive layer formed over the first region; a second conductive layer formed over the second region, the second conductive layer has a conductivity type opposite to the first conductive layer; a first electrode forming electrical contact with the first conductive layer; a second electrode forming electrical contact with the second conductive layer; and a boundary region between the gap region and the conductive layer(s) adjacent thereto, the boundary region including strip or line-patterned texture structures arranged at intervals.

The application discloses a solar cell and a preparation method for a solar cell. The preparation method for a solar cell comprises: sequentially forming a tunnel silicon oxide layer, an N-type doped polysilicon layer, and a back passivated anti-reflection film on a back surface of an N-type silicon substrate; performing grooving on the back passivated anti-reflection film, and forming a nickel metal layer in a grooved region; printing a back fine gate electrode on the nickel metal layer, and printing a back main gate electrode on the back passivated anti-reflection film, wherein the back fine gate electrode is electrically connected to the back main gate electrode.

Disclosed is solar cell, a photovoltaic module, and a method for manufacturing a photovoltaic module. The solar cell includes a substrate, first busbars and second busbars arranged on the substrate, first fingers connected to the first busbars, and second fingers connected to the second busbars. The first busbars and the second busbars have opposite polarities. The first fingers have a same polarity as the first busbars, and the second fingers have a same polarity as the second busbars. The substrate is provided with busbar pits. At least part of the first and second busbars are located in the busbar pits. Depths of the busbar pits range from 30 m to 50 m. Along a thickness direction of the substrate, ratios of the depths of the busbar pits to heights of the first busbars and/or the second busbars range from 10:3 to 6:5.

The present disclosure pertains to the field of back contact cell technologies, and particularly relates to a hybrid passivation back contact cell and a fabrication method thereof, the hybrid passivation back contact cell including: an N-type doped silicon substrate having a light receiving surface and a back surface, and a first semiconductor layer and a second semiconductor layer which are arranged on the back surface, wherein the second semiconductor layer includes an intrinsic silicon layer and a P-type doped silicon layer sequentially arranged in an outward direction perpendicular to the back surface, and the first semiconductor layer includes a tunneling oxide layer and an N-type doped silicon crystal layer sequentially arranged in the outward direction perpendicular to the back surface.

Thermocompression bonding approaches for foil-based metallization of non-metal surfaces of solar cells, and the resulting solar cells, are described. For example, a solar cell includes a substrate and a plurality of alternating N-type and P-type semiconductor regions disposed in or above the substrate. A plurality of conductive contact structures is electrically connected to the plurality of alternating N-type and P-type semiconductor regions. Each conductive contact structure includes a metal foil portion disposed in direct contact with a corresponding one of the alternating N-type and P-type semiconductor regions.