Patent classifications
H10F77/703
SEMICONDUCTOR DEVICE
A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The active region is located between the first semiconductor structure and the second semiconductor structure. The active region includes a light-emitting region having N pair(s) of semiconductor stack(s). Each of the semiconductor stack includes a well layer and a barrier layer, in which N is a positive integer greater than or equal to 1. The well layer includes a first group III-V semiconductor material including indium with a first percentage of indium content. The barrier layer includes a second group III-V semiconductor material including indium with a second percentage of indium content. The first group III-V semiconductor material and the second group III-V semiconductor material further includes phosphorus. The second percentage of indium content is less than the first percentage of indium content.
Solar cell panel manufacturing method and paste for solar cell electrode used therefor
In a method for manufacturing a solar cell panel according to an embodiment of the present invention, a step of forming an electrode comprises the steps of: forming a main electrode part on a conductive region; and forming a connection electrode part on the main electrode part by using a paste comprising metal particles having a first metal, a solder material having a second metal different from the first metal, and an adhesive material.
PASSIVATING AND CONDUCTING LAYERED STRUCTURE FOR SOLAR CELLS
A layered structure is provided for a solar cell having tunnel-oxide-passivated contacts. The layered structure includes at least one tunnel oxide layer and a c-SiCx layer, wherein x0.5. A solar cell having tunnel-oxide-passivated contacts is also provided. The solar cell includes at least one crystalline n-doped or p-doped silicon layer, and the layered structure having the tunnel-oxide passivated contacts. A method for producing a layered structure for a solar cell having tunnel-oxide-passivated contacts is additionally provided. The method includes providing a substrate layer comprising a silicon layer, depositing a tunnel oxide layer on the substrate layer, and depositing a u c-SiCx:H layer, which is n-doped or p-doped, on the tunnel oxide layer.
INTERFACE PREPARATION FOR TANDEM PHOTOVOLTAIC DEVICES
Ways of making and using tandem photovoltaic devices are provided, where such devices can include a first submodule, a second submodule, and an interface between the first submodule and the second submodule. The interface permits a portion of light to pass therethrough and optically couples the first submodule and the second submodule. Optically coupling the first submodule and the second submodule includes reducing reflection of the portion of light passing through the interface.
SOLAR CELL AND PREPARATION METHOD FOR SOLAR CELL
The application discloses a solar cell and a preparation method for a solar cell. The preparation method for a solar cell comprises: sequentially forming a tunnel silicon oxide layer, an N-type doped polysilicon layer, and a back passivated anti-reflection film on a back surface of an N-type silicon substrate; performing grooving on the back passivated anti-reflection film, and forming a nickel metal layer in a grooved region; printing a back fine gate electrode on the nickel metal layer, and printing a back main gate electrode on the back passivated anti-reflection film, wherein the back fine gate electrode is electrically connected to the back main gate electrode.
Solar cell, method for preparing the same, and photovoltaic module
A solar cell is provided, including a substrate having a rear surface including P-type regions and N-type regions, first dielectric layers each formed over a N-type region, first doped polysilicon layers each formed on a first dielectric layer and doped with an N-type doping element, second dielectric layers each formed over a P-type region, second doped polysilicon layers each formed on a second dielectric layer and doped with a P-type doping element, a passivation layer formed over surfaces of the first and second doped polysilicon layers, and first and second electrodes penetrating the passivation layer. Each first electrode is electrically connected to a first doped polysilicon layer and each second electrode is electrically connected to a second doped polysilicon layer. A first roughness of a surface of a first doped polysilicon layer is greater than a second roughness of a surface of a second doped polysilicon layer.
BACK CONTACT SOLAR CELL AND FABRICATION METHOD THEREOF
The present invention discloses a back contact solar cell. The back contact solar cell includes a semiconductor substrate having a front surface and a rear surface; a first conductive type semiconductor region having a first conductive type and a second conductive type semiconductor region having a second conductive type at an interval on the rear surface of the semiconductor substrate. Furthermore, the rear surface of the semiconductor substrate has a texturing structure at the interval between the first conductive type semiconductor region and the second conductive type semiconductor region.
SOLAR CELL EMITTER REGION FABRICATION WITH DIFFERENTIATED P-TYPE AND N-TYPE ARCHITECTURES AND INCORPORATING DOTTED DIFFUSION
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.
FORMATION OF ANTIREFLECTIVE SURFACES
Methods for etching nanostructures in a substrate include depositing a patterned block copolymer on the substrate, the patterned block copolymer including first and second polymer block domains, applying a precursor to the patterned block copolymer to generate an infiltrated block copolymer, the precursor infiltrating into the first polymer block domain and generating a material in the first polymer block domain, applying a removal agent to the infiltrated block copolymer to generate a patterned material, the removal agent removing the first and second polymer block domains from the substrate, and etching the substrate, the patterned material on the substrate masking the substrate to pattern the etching. The etching may be performed under conditions to produce nanostructures in the substrate.
GENERATION OF TEXTURED SURFACES, MANUFACTURING OF TANDEM SOLAR CELLS, AND TANDEM SOLAR CELL
In a method for generating a textured surface of a semiconductor layer, a surface of the semiconductor layer is etched anisotropically with a first alkaline etching solution to generate a surface of the semiconductor layer including pyramid-shape textures. Subsequently, the surface including the pyramid-shaped textures is etched anisotropically with a second alkaline etching solution, which differs from the first alkaline etching solution, to cause material removal of the pyramid-shaped textures, thereby reducing a height difference between peaks and neighboring valleys of the pyramid-shaped textures. A method for manufacturing a tandem solar cell further includes generating a first solar cell structure of the tandem solar cell including the textured surface, and generating a second solar cell structure of the tandem solar cell on the side of the first solar cell structure on which the textured surface is arranged.