Patent classifications
H10H20/01
MICRON-SCALE LIGHT-EMITTING DEVICE WITH REDUCED-AREA CENTRAL ANODE CONTACT
A semiconductor LED includes p-doped, n-doped, and active layers, and has anode and cathode electrical contacts. The p-doped layer has a refractive index of n.sub.P and a nonzero thickness less than 10.sub.0/n.sub.P. The LED is less than 30.sub.0/n.sub.P wide, and the anode electrical contact is in direct contact with only a central region of the p-doped layer that is separated from the LED side surfaces by more than .sub.0/2n.sub.P. The LED width, the separation of the anode contact from the LED side surface, and the p-doped layer thickness can result in one or more of (i) increased Purcell factor, (ii) increased extraction efficiency, (iii) increased overall light output efficiency, or (iv) narrowed light output angular distribution.
METHOD OF MANUFACTURING SEMICONDUCTOR CHIP
The disclosure provides a method of manufacturing a semiconductor chip. The method of manufacturing the semiconductor chip includes the following steps: providing a first carrier; transferring a semiconductor die to the first carrier, wherein the semiconductor die has a surface and another surface opposite to each other; forming a filling layer on a side surface of the semiconductor die; forming a reflective layer on the semiconductor die and the side surface, wherein the reflective layer includes a first part and a second part, the first part is disposed on the surface of the semiconductor die, and the second part is disposed on the filling layer; and forming a conductive layer on the another surface of the semiconductor die. The method of manufacturing the semiconductor chip of the disclosure may directly perform detection after the semiconductor chip is transferred.
On-site Growth of Halide Perovskite Micro and Nanocrystals
A system and method for patterned growth of halide perovskite nanocrystals is disclosed. This method allows control over the size, number and position of the nanocrystals, while ensuring compatibility with device integration processes. The method uses a topographical template comprising a plurality of wells with asymmetric surface wetting to confine the nanocrystal growth to within the wells. Further, the shape and surface wetting properties of the wells are used to induce local directional forces to guide nanocrystal positioning during the growth process. With this technique, scalable arrays of nanocrystals with tunable dimensions and precise positional accuracy are possible. As an example, this method allows arrays of active nanoscale perovskite light emitting diodes (LEDs).
PATTERNING METHOD OF QUANTUM DOTS, METHOD FOR PRODUCING OPTICAL DEVICE, METHOD FOR MANUFACTURING BACKLIGHT UNIT, AND METHOD FOR MANUFACTURING IMAGE DISPLAY DEVICE
A patterning method of quantum dots, the method includes the steps of coating with a mixture containing quantum dots and a curable resin on a substrate to obtain a resin layer, ejecting a curing agent in a pattern shape on the resin layer by an inkjet method, performing a curing treatment to cure the portion of the resin layer where the curing agent was ejected, and removing an uncured portion of the resin layer with a solvent.
DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
The present application provides a display panel and a manufacturing method thereof, the manufacturing method comprises: providing a first substrate, wherein a side of the first substrate is provided with a plurality of Micro-LED chips that are spaced apart from each other; providing a second substrate, wherein a surface on a side of the second substrate has a plurality of conductive layer parts; forming an isolation layer on the second substrate, wherein the isolation layer has a plurality of opening groups, each of the opening groups comprises a first opening and a second opening to expose a surface of one of the conductive layer parts, wherein a width of the first opening is greater than that of a P-type electrode, and a width of the second opening is greater than that of a N-type electrode; forming a first bonding layer in the first opening and forming a second bonding layer in the second opening; while supporting the chip body by the isolation layer, bonding the P-type electrode with the first bonding layer and simultaneously bonding the N-type electrode with the second bonding layer, wherein the P-type electrode is embedded into the first bonding layer and the N-type electrode is embedded into the second bonding layer.
Vertical light emitting devices with nickel silicide bonding and methods of manufacturing
Various embodiments of light emitting devices, assemblies, and methods of manufacturing are described herein. In one embodiment, a method for manufacturing a lighting emitting device includes forming a light emitting structure, and depositing a barrier material, a mirror material, and a bonding material on the light emitting structure in series. The bonding material contains nickel (Ni). The method also includes placing the light emitting structure onto a silicon substrate with the bonding material in contact with the silicon substrate and annealing the light emitting structure and the silicon substrate. As a result, a nickel silicide (NiSi) material is formed at an interface between the silicon substrate and the bonding material to mechanically couple the light emitting structure to the silicon substrate.
Display device using semiconductor light-emitting element, and manufacturing method therefor
The present invention provides a display device using a semiconductor light-emitting element and a manufacturing method therefor, the display device transferring semiconductor light-emitting elements on a temporary substrate, and then directly implementing, through a stack process, the structure of a wiring substrate on the temporary substrate on which the semiconductor light-emitting elements are arrayed, thereby enabling the semiconductor light-emitting elements and the wiring substrate to be electrically connected.
Display device and method for manufacturing same
A display device comprises a display area, a non-display area surrounding the display area, pixels disposed in the display area of the substrate, each of the pixels including a first electrode, a second electrode, and light-emitting elements electrically connected to the first electrode and the second electrode, and a first voltage wiring disposed in the display area and the non-display area, the first voltage wiring electrically connected to at least some of the pixels. The first voltage wiring includes a first separation wiring disposed in the non-display area, and a second separation wiring disposed in the non-display area and spaced apart from the first separation wiring.
Display device and method of manufacturing display device
A display device and a method of manufacturing a display device are provided. A method of manufacturing a display device may include: forming a sacrificial layer on a carrier glass; forming a first substrate layer on the sacrificial layer, the first substrate layer including an organic insulation material; forming a first through-hole in the first substrate layer, the first through-hole passing through the first substrate layer; forming a wiring on an upper surface of the first substrate layer, the wiring extending into the first through-hole; sequentially forming a circuit layer, an emission layer, and an encapsulation layer on the wiring; separating the sacrificial layer and the carrier glass from the first substrate layer by irradiating the sacrificial layer with a laser; and attaching a driving element on a lower surface of the first substrate layer, the driving element being electrically connected to the wiring through the first through-hole.
Display device including partitioning wall comprising transparent conductive oxide and method for manufacturing the same
A display device includes a base substrate, a partitioning wall on the base substrate, wherein the partitioning wall includes a first partitioning wall, and a second partitioning wall on the first partitioning wall, and a light emitting element spaced from the partitioning wall and located in a space surrounded by the partitioning wall in a plan view. The first partitioning wall and the light emitting element include a same material. The second partitioning wall includes a transparent conductive oxide.