Patent classifications
H10H20/0133
LIGHT EMITTING DIODES WITH ALUMINUM-CONTAINING LAYERS INTEGRATED THEREIN AND ASSOCIATED METHODS
A light-emitting diode (LED) structure includes an active region that has at least one aluminum-containing quantum well (QW) stack that emits light from the LED structure when activated. The LED structure exhibits a modified internal quantum efficiency value, which is higher than a LED structure that does not include aluminum within a QW stack. The LED structure also exhibits a modified peak wavelength, which is longer than an unmodified peak wavelength of the unmodified LED structure.
METHOD FOR SEPARATING A BONDED WAFER
The present disclosure provides a method for separating a bonded wafer, including separating a support from a bonded wafer.
CHIP STRUCTURE AND MANUFACTURING METHOD THEREFOR, DISPLAY SUBSTRATE AND DISPLAY DEVICE
A chip structure is provided. The chip structure includes a chip wafer unit and a color conversion layer substrate unit arranged on a light-exit side of the chip wafer unit. The chip wafer unit includes a plurality of sub-pixel light-emitting functional layers. The color conversion layer substrate unit includes a color conversion layer arranged on the light-exit side of the chip wafer unit. The chip wafer unit further includes a first bonding layer, arranged between the sub-pixel light-emitting functional layers and the color conversion layer, and configured to bond the chip wafer unit and the color conversion layer substrate unit.
OHMIC CONTACTS FOR SEMICONDUCTOR STRUCTURES
A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAl.sub.xN.sub.y material at least partially contiguous with the semiconductor structure. The TiAl.sub.xN.sub.y material can be TiAl.sub.3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAl.sub.xN.sub.y material, such that the TiAl.sub.xN.sub.y material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.
Light-emitting device with polarization modulated last quantum barrier
A light-emitting device includes doped layer arranged on a substrate. The doped layer is n-doped or p-doped. A multiple quantum well is arranged on the doped layer and includes a plurality of adjacent pairs of quantum wells and quantum barriers. An electron blocking layer is arranged on the multiple quantum well. The doped layer, the electron blocking layer, the quantum wells, and all of the quantum barriers except for the last quantum barrier include a first III-nitride alloy. The last quantum barrier includes a second III-nitride alloy that is different from the first III-nitride alloy. The second III-nitride alloy has a bandgap larger than a bandgap of the last quantum well and smaller than a bandgap of the electron blocking layer. An interface between the last quantum barrier and the electron blocking layer exhibits a polarization difference between 0 and 0.012 C/m.sup.2.
LIGHT EMITTING DEVICE
The presented devices and methods are directed to efficient and effective photon emission. In one embodiment, high-performance tunnel junction deep ultraviolet (UV) light-emitting diodes (LEDs) are created using plasma-assisted molecular beam epitaxy. The device heterostructure was grown under slightly Ga-rich conditions to promote the formation of nanoscale clusters in the active region. The nanoscale clusters can act as charge containment configurations. In one exemplary implementation, a device operates at approximately 255 nm light emission with a maximum external quantum efficiency (EPE) of 7.2% and wall-plug efficiency (WPE) of 4%, which are nearly one to two orders of magnitude higher than previously reported tunnel junction devices operating at this wavelength. The devices exhibit highly stable emission originating from highly localized carriers in Ga-rich regions formed in the active region, with nearly constant emission peak with increasing current density up to 200 A/cm.sup.2, due to the strong charge carrier confinement related to the presence of nanoclusters (e.g., Ga-rich) and radiative emission originating from highly localized carriers in Ga-rich regions formed in the active region
LED WITH STRESS-BUFFER LAYER UNDER METALLIZATION LAYER
Semiconductor LED layers are epitaxially grown on a patterned surface of a sapphire substrate. The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact and an n-metal contact. A dielectric polymer stress-buffer layer is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.
Non-Uniform Multiple Quantum Well Structure
A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.
SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHODS THEREOF
A method of manufacturing a semiconductor substrate including forming a first layer on a substrate, patterning the first layer to form a plurality of patterns spaced apart from one another, forming a second layer on the patterns to cover each of the patterns, heat-treating the second layer to form cavities in the patterns between the second layer and the substrate, and growing the second layer covering the cavities.
SUBSTRATE FOR SEMICONDUCTOR LIGHT EMITTING DEVICE AND SEMICONDUCTOR LIGHT EMITTING DEVICE, AND MANUFACTURING METHODS THEREOF
A method of manufacturing a semiconductor light emitting device, the method including arranging multiple particles M in a monolayer on a substrate S, dry etching the multiple particles M arranged to provide a void between the particles M in a condition by which the particles M are etched while the substrate S is not substantially etched; and dry etching the substrate S by using the multiple particles M.sub.1 after the particle etching as an etching mask, thereby forming an uneven structure on one surface X the substrate S.